English
Language : 

C8051F50X_11 Datasheet, PDF (41/313 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family
C8051F50x/F51x
5.2. Electrical Characteristics
Table 5.2. Global Electrical Characteristics
–40 to +125 °C, 24 MHz system clock unless otherwise specified.
Parameter
Conditions
Min Typ Max
Supply Input Voltage (VREGIN)
1.8 — 5.25
Digital Supply Voltage (VDD) System Clock < 25 MHz
VRST1 — 2.75
System Clock > 25 MHz
2
2.75
Analog Supply Voltage (VDDA) System Clock < 25 MHz
VRST1 — 2.75
(Must be connected to VDD) System Clock > 25 MHz
2
2.75
Digital Supply RAM Data
1.5
Retention Voltage
Port I/O Supply Voltage (VIO) Normal Operation
1.82 — 5.25
SYSCLK (System Clock)3
0
— 50
TSYSH (SYSCLK High Time)
9
——
TSYSL (SYSCLK Low Time)
9
——
Specified Operating
Temperature Range
–40 — +125
Digital Supply Current—CPU Active (Normal Mode, fetching instructions from Flash)
IDD4
VDD = 2.1 V, F = 200 kHz
— 95 —
VDD = 2.1 V, F = 1.5 MHz
— 700 —
VDD = 2.1 V, F = 25 MHz
— 10 11
VDD = 2.1 V, F = 50 MHz
— 19 21
Units
V
V
V
V
MHz
ns
ns
°C
µA
µA
mA
mA
Notes:
1. Given in Table 5.4 on page 46.
2. VIO should not be lower than the VDD voltage.
3. SYSCLK must be at least 32 kHz to enable debugging.
4. Based on device characterization data; Not production tested. Does not include oscillator supply current.
5. IDD can be estimated for frequencies < 12.5 MHz by simply multiplying the frequency of interest by the
frequency sensitivity number for that range. When using these numbers to estimate IDD for >12.5 MHz, the
estimate should be the current at 50 MHz minus the difference in current indicated by the frequency
sensitivity number. For example: VDD = 2.6 V; F = 20 MHz, IDD = 26 mA - (50 MHz -
20 MHz) * 0.48 mA/MHz = 11.6 mA.
6. Idle IDD can be estimated for frequencies < 1 MHz by simply multiplying the frequency of interest by the
frequency sensitivity number for that range. When using these numbers to estimate Idle IDD for >1 MHz, the
estimate should be the current at 50 MHz minus the difference in current indicated by the frequency
sensitivity number. 
For example: VDD = 2.6 V; F = 5 MHz, Idle IDD = 21 mA – (50 MHz – 5 MHz) x 0.41 mA/MHz = 2.6 mA.
Rev. 1.2
41