C8051F50X_11 Datasheet, PDF (149/313 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F50x/F51x
Table 18.1. EMIF Pinout (C8051F500/1/4/5)
Multiplexed Mode
Signal Name
Port Pin
RD
P1.6
Non Multiplexed Mode
Signal Name
Port Pin
RD
P1.6
WR
P1.7
WR
P1.7
ALE
P1.5
D0
P4.0
D0/A0
P4.0
D1
P4.1
D1/A1
P4.1
D2
P4.2
D2/A2
P4.2
D3
P4.3
D3/A3
P4.3
D4
P4.4
D4/A4
P4.4
D5
P4.5
D5/A5
P4.5
D6
P4.6
D6/A6
P4.6
D7
P4.7
D7/A7
P4.7
A0
P3.0
A8
P3.0
A1
P3.1
A9
P3.1
A2
P3.2
A10
P3.2
A3
P3.3
A11
P3.3
A4
P3.4
A12
P3.4
A5
P3.5
A13
P3.5
A6
P3.6
A14
P3.6
A7
P3.7
A15
P3.7
A8
P2.0
—
—
A9
P2.1
—
—
A10
P2.2
—
—
A11
P2.3
—
—
A12
P2.4
—
—
A13
P2.5
—
—
A14
P2.6
—
—
A15
P2.7
Rev. 1.2
149