C8051F50X_11 Datasheet, PDF (113/313 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F50x/F51x
Table 13.3. Special Function Registers
SFRs are listed in alphabetical order. All undefined SFR locations are reserved
Register
Address
Description
ACC
0xE0
Accumulator
ADC0CF
0xBC
ADC0 Configuration
ADC0CN
0xE8
ADC0 Control
ADC0GTH
0xC4
ADC0 Greater-Than Compare High
ADC0GTL
0xC3
ADC0 Greater-Than Compare Low
ADC0H
ADC0L
0xBE
0xBD
ADC0 High
ADC0 Low
ADC0LTH
0xC6
ADC0 Less-Than Compare Word High
ADC0LTL
0xC5
ADC0 Less-Than Compare Word Low
ADC0MX
0xBB
ADC0 Mux Configuration
ADC0TK
0xBA
ADC0 Tracking Mode Select
B
0xF0
B Register
CCH0CN
0xE3
Cache Control
CKCON
CLKMUL
0x8E
0x97
Clock Control
Clock Multiplier
CLKSEL
0x8F
Clock Select
CPT0CN
0x9A
Comparator0 Control
CPT0MD
0x9B
Comparator0 Mode Selection
CPT0MX
0x9C
Comparator0 MUX Selection
CPT1CN
0x9D
Comparator1 Control
CPT1MD
CPT1MX
DPH
0x9E
0x9F
0x83
Comparator1 Mode Selection
Comparator1 MUX Selection
Data Pointer High
DPL
0x82
Data Pointer Low
EIE1
0xE6
Extended Interrupt Enable 1
EIE2
0xE7
Extended Interrupt Enable 2
EIP1
0xF6
Extended Interrupt Priority 1
EIP2
0xF7
Extended Interrupt Priority 2
EMI0CF
EMI0CN
0xB2
0xAA
External Memory Interface Configuration
External Memory Interface Control
EMI0TC
0xAA
External Memory Interface Timing Control
FLKEY
0xB7
Flash Lock and Key
FLSCL
0xB6
Flash Scale
IE
0xA8
Interrupt Enable
IP
0xB8
Interrupt Priority
Page
94
63
65
67
67
64
64
68
68
71
66
94
137
266
171
166
77
78
82
77
78
82
93
93
123
123
124
125
152
151
157
135
136
121
122
Rev. 1.2
113