C8051F50X_11 Datasheet, PDF (308/313 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F50x/F51x
C2 Register Definition 28.4. FPCTL: C2 Flash Programming Control
Bit
7
6
5
4
3
2
1
0
Name
FPCTL[7:0]
Type
R/W
Reset
0
0
0
0
0
0
0
0
C2 Address: 0x02
Bit Name
Function
7:0 FPCTL[7:0] Flash Programming Control Register.
This register is used to enable Flash programming via the C2 interface. To enable C2
Flash programming, the following codes must be written in order: 0x02, 0x01. Note
that once C2 Flash programming is enabled, a system reset must be issued to
resume normal operation.
C2 Register Definition 28.5. FPDAT: C2 Flash Programming Data
Bit
7
6
5
4
3
2
1
0
Name
FPDAT[7:0]
Type
R/W
Reset
0
0
0
0
0
0
0
0
C2 Address: 0xB4
Bit Name
Function
7:0 FPDAT[7:0] C2 Flash Programming Data Register.
This register is used to pass Flash commands, addresses, and data during C2 Flash
accesses. Valid commands are listed below.
Code
0x06
Command
Flash Block Read
0x07
Flash Block Write
0x08
Flash Page Erase
0x03
Device Erase
308
Rev. 1.2