C8051F50X_11 Datasheet, PDF (112/313 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F50x/F51x
Table 13.2. Special Function Register (SFR) Memory Map for Page 0xC
0(8)
F8
1(9)
2(A)
3(B)
4(C)
5(D)
6(E)
7(F)
CAN0IF2DA2L CAN0IF2DA2H CAN0IF2DB1L CAN0IF2DB1H CAN0IF2DB2L CAN0IF2DB2H
F0
B
(All Pages)
E8
CAN0IF2A2L CAN0IF2A2H
CAN0IF2DA1L CAN0IF2DA1H
CAN0IF2M1L CAN0IF2M1H CAN0IF2M2L CAN0IF2M2H CAN0IF2A1L CAN0IF2A1H
E0 ACC
(All Pages)
D8
CAN0IF2CML CAN0IF2CMH
EIE1
(All Pages)
CAN0IF1DB1L CAN0IF1DB1H CAN0IF1DB2L CAN0IF1DB2H CAN0IF2CRL
EIE2
(All Pages)
CAN0IF2CRH
D0 PSW
(All Pages)
C8
CAN0IF1MCL CAN0IF1MCH CAN0IF1DA1L CAN0IF1DA1H CAN0IF1DA2L CAN0IF1DA2H
CAN0IF1A1L CAN0IF1A1H CAN0IF1A2L CAN0IF1A2H CAN0IF2MCL CAN0IF2MCH
C0 CAN0CN
CAN0IF1CML CAN0IF1CMH CAN0IF1M1L CAN0IF1M1H CAN0IF1M2L CAN0IF1M2H
B8
IP
(All Pages)
B0 P3
(All Pages)
A8
IE
(All Pages)
A0 P2 CAN0BRPE
(All Pages)
98 SCON0
(All Pages)
90 P1
(All Pages)
88 TCON
TMOD
(All Pages) (All Pages)
80 P0
SP
(All Pages) (All Pages)
0(8)
1(9)
(bit addressable)
CAN0MV1L
CAN0IP2L
CAN0ND1L
CAN0TR1L
CAN0BTL
CAN0CFG
TL0
(All Pages)
DPL
(All Pages)
2(A)
CAN0MV1H
CAN0IP2H
CAN0ND1H
CAN0TR1H
CAN0BTH
TL1
(All Pages)
DPH
(All Pages)
3(B)
CAN0MV2L
CAN0ND2L
CAN0TR2L
CAN0IIDL
CAN0STAT
TH0
(All Pages)
4(C)
CAN0MV2H
P4
(All Pages)
CAN0ND2H
CAN0TR2H
CAN0IIDH
TH1
(All Pages)
SFRNEXT
(All Pages)
5(D)
CAN0IF1CRL CAN0IF1CRH
FLSCL
(All Pages)
CAN0IP1L
FLKEY
(All Pages)
CAN0IP1H
CAN0TST
SFRPAGE
(All Pages)
CAN0ERRL CAN0ERRH
CKCON
(All Pages)
SFRLAST
(All Pages)
6(E)
PCON
(All Pages)
7(F)
112
Rev. 1.2