RX62T_15 Datasheet, PDF (86/136 Pages) Renesas Technology Corp – Renesas MCUs

Under development ^{Preliminary document}
Specifications in this document are tentative and subject to change.
RX62T Group, RX62G Group
4. I/O Registers
Table 4.2
Module
Abbreviation
MTU3
List of I/O Registers (Bit Order) (19 / 30)
Register
Abbreviation
TGRA
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
MTU3
TGRB
MTU4
TGRA
MTU4
TGRB
MTU
TCNTSA
MTU
TCBRA
MTU3
TGRC
MTU3
TGRD
MTU4
TGRC
MTU4
TGRD
MTU3
MTU4
MTU
MTU
MTU
MTU
MTU
MTU3
MTU4
MTU
MTU
MTU
MTU4
MTU4
TSR
TSR
TITCR1A
TBTERA
TBTERA
TDERA
TOLBRA
TBTM
TBTM
TITMRA
TITCR2A
TITCNT2A
TADCR
TADCORA
TCFD
—
TCFD
—
T3AEN
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
BF[1:0]
UT4AE
DT4AE
—
TCFV
—
TCFV
T3ACOR[2:0]
T3ACOR[2:0]
—
—
—
—
OLS3N
OLS3P
—
—
—
—
—
—
—
—
—
—
—
—
UT4BE
DT4BE
TGFD
TGFD
T4VEN
—
—
—
OLS2N
—
—
—
—
—
—
ITA3AE
TGFC
TGFC
—
—
OLS2P
—
—
—
—
ITA4VE
TGFB
TGFA
TGFB
TGFA
T4VCOR[2:0]
T4VCNT[2:0]]
BTE[1:0]
—
TDER
OLS1N
OLS1P
TTSB
TTSA
TTSB
TTSA
—
TITM
TRG4COR[2:0]
TRG4COR[2:0]
—
—
ITB3AE
ITB4VE
MTU4
TADCORB
MTU4
TADCOBRA
MTU4
TADCOBRB
MTU
MTU
MTU3
MTU4
MTU4
MTU
MTU
MTU
MTU
MTU0
TWCRA
TMDR2A
TGRE
TGRE
TGRF
TSTRA
TSYRA
TCSYSTR
TRWERA
TCR
CCE
—
—
—
—
—
—
WRE
—
—
—
—
—
—
—
DRS
CST4
SYNC4
SCH0
—
CST3
SYNC3
SCH1
—
CCLR[2:0]
—
—
SCH2
—
—
—
—
—
SCH3
SCH4
—
—
CKEG[1:0]
CST2
SYNC2
—
—
CST1
SYNC1
SCH6
—
TPSC[2:0]
CST0
SYNC0
SCH7
RWE
R01DS0096EJ0200 Rev.2.00
Jan 10, 2014
Page 86 of 134