RX62T_15 Datasheet, PDF (36/136 Pages) Renesas Technology Corp – Renesas MCUs

Under development ^{Preliminary document}
Specifications in this document are tentative and subject to change.
RX62T Group, RX62G Group
2. CPU
2. CPU
The RX CPU has sixteen general-purpose registers, nine control registers, and one accumulator used for DSP
instructions.
General-purpose register
b31
b0
R0 (SP) *
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13
R14
R15
DSP instruction register
b63
Control register
b31
b0
ISP
(Interrupt stack pointer)
USP
(User stack pointer)
INTB (Interrupt table register)
PC
(Program counter)
PSW (Processor status word)
BPC
(Backup PC)
BPSW (Backup PSW)
FINTV
FPSW
(Fast interrupt vector register)
(Floating-point status word)
b0
ACC (Accumulator)
Note: * The stack pointer (SP) can be the interrupt stack pointer (ISP) or user stack pointer (USP),
according to the value of the U bit in the PSW register.
Figure 2.1
Register Set of the CPU
R01DS0096EJ0200 Rev.2.00
Jan 10, 2014
Page 36 of 134