RX62T_15 Datasheet, PDF (77/136 Pages) Renesas Technology Corp – Renesas MCUs

Under development ^{Preliminary document}
Specifications in this document are tentative and subject to change.
RX62T Group, RX62G Group
4. I/O Registers
Table 4.2
Module
Abbreviation
AD0
List of I/O Registers (Bit Order) (10 / 30)
Register
Abbreviation
ADDRB^*1
Bit
31/23/15/7
—
Bit
30/22/14/6
—
Bit
29/21/13/5
—
Bit
28/20/12/4
—
Bit
27/19/11/3
—
Bit
26/18/10/2
—
Bit
25/17/9/1
Bit
24/16/8/0
AD0
ADDRC^*1
—
—
—
—
—
—
AD0
ADDRD^*1
—
—
—
—
—
—
AD0
ADDRE^*1
—
—
—
—
—
—
AD0
ADDRF^*1
—
—
—
—
—
—
AD0
ADDRG^*1
—
—
—
—
—
—
AD0
ADDRH^*1
—
—
—
—
—
—
AD0
ADCSR
—
ADIE
ADST
—
CH[3:0]
AD0
ADCR
—
—
—
—
CKS[1:0]
MODE[1:0]
AD0
ADSSTR
AD0
ADDIAGR
—
—
—
—
—
—
DIAG[1:0]
AD0
ADDRI^*1
—
—
—
—
—
—
AD0
ADDRJ^*1
—
—
—
—
—
—
AD0
ADDRK *¹
—
—
—
—
—
—
AD0
ADDRL^*1
—
—
—
—
—
—
AD0
AD0
SCI0
SCI0
SCI0
SCI0
SCI0
SCI0
SCI0
SCI0
SMCI0
SMCI0
SMCI0
SMCI0
SMCI0
SMCI0
SMCI0
SCI1
SCI1
SCI1
SCI1
SCI1
SCI1
SCI1
ADSTRGR
ADDPR
SMR
BRR
SCR
TDR
SSR
RDR
SCMR
SEMR
SMR
BRR
SCR
TDR
SSR
RDR
SCMR
SMR
BRR
SCR
TDR
SSR
RDR
SCMR
—
DPSEL
CM
TIE
TDRE
BCP2
—
GM
TIE
TDRE
BCP2
CM
TIE
TDRE
BCP2
—
—
CHR
RIE
RDRF
—
—
BLK
RIE
RDRF
—
CHR
RIE
RDRF
—
—
—
PE
TE
ORER
—
NFEN
PE
TE
ORER
—
PE
TE
ORER
—
—
PM
RE
FER
—
ABCS
PM
RE
ERS
—
PM
RE
FER
—
—
STOP
ADSTRS[4:0]
—
MP
—
DPPRC
CKS[1:0]
MPIE
TEIE
CKE[1:0]
PER
TEND
MPB
MPBT
SDIR
SINV
—
—
(BCP[1:0])
—
SMIF
—
—
CKS[1:0]
MPIE
TEIE
CKE[1:0]
PER
TEND
MPB
MPBT
SDIR
STOP
SINV
MP
—
SMIF
CKS[1:0]
MPIE
TEIE
CKE[1:0]
PER
TEND
MPB
MPBT
SDIR
SINV
—
SMIF
R01DS0096EJ0200 Rev.2.00
Jan 10, 2014
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