RX62T_15 Datasheet, PDF (124/136 Pages) Renesas Technology Corp – Renesas MCUs

Under development ^{Preliminary document}
Specifications in this document are tentative and subject to change.
RX62T Group, RX62G Group
5. Electrical Characteristics
5.6 Oscillation Stop Detection Timing
Table 5.20 Oscillation Stop Detection Circuit Characteristics
Note:Items for which test conditions are not specifically stated in the table below have the same values under conditions 1 to 3.
Condition 1: VCC = PLLVCC = 2.7 to 3.6 V, VSS = PLLVSS = AVSS0 = AVSS = VREFL0 = 0 V
AVCC0 = AVCC = 3.0 to 3.6 V, VREFH0 = 3.0 V to AVCC0, VREF = 3.0 V to AVCC
Condition 2: VCC = PLLVCC = 2.7 to 3.6 V, VSS = PLLVSS = AVSS0 = AVSS = VREFL0 = 0 V
AVCC0 = AVCC = 4.0 to 5.5 V, VREFH0 = 4.0 V to AVCC0, VREF = 4.0 V to AVCC
Condition 3: VCC = PLLVCC = 4.0 to 5.5 V, VSS = PLLVSS = AVSS0 = AVSS = VREFL0 = 0 V
AVCC0 = AVCC = 4.0 to 5.5 V, VREFH0 = 4.0 V to AVCC0, VREF = 4.0 V to AVCC
Ta = Topr. Ta is the same under conditions 1 to 3.
Item
Detection time
Symbol
tdr
Min.
-
Typ.
-
Max.
Unit
1.0
ms
Test
Conditions
Figure 5.23
Internal oscillation frequency when f_MAIN
0.5
-
oscillation stop is detected
7.0
MHz
Main clock oscillator
t dr
OSTDF*
Normal operation
Abnormal operation
Internal oscillation
ICLK
Note : * This indicates the OSTDF flag in the oscillation detection control register (OSTDCR).
Figure 5.23 Oscillation Stop Detection Timing
R01DS0096EJ0200 Rev.2.00
Jan 10, 2014
Page 124 of 134