RX62T_15 Datasheet, PDF (68/136 Pages) Renesas Technology Corp – Renesas MCUs

Under development ^{Preliminary document}
Specifications in this document are tentative and subject to change.
RX62T Group, RX62G Group
4. I/O Registers
4.2 I/O Register Bits
Register addresses and bit names of the peripheral modules are described below.
Each line cover eight bits, and 16-bit and 32-bit registers are shown as 2 or 4 lines, respectively.
Table 4.2
Module
Abbreviation
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
BSC
BSC
BSC
BSC
DTC
DTC
List of I/O Registers (Bit Order) (1 / 30)
Register
Abbreviation
MDMONR
MDSR
SYSCR0
SYSCR1
SBYCR
MSTPCRA
MSTPCRB
MSTPCRC
SCKCR
OSTDCR
BERCLR
BEREN
BERSR1
BERSR2
DTCCR
DTCVBR
Bit
31/23/15/7
—
MDE
—
—
—
—
—
SSBY
—
ACSE
MSTPA23
MSTPA15
MSTPA7
MSTPB31
MSTPB23
—
MSTPB7
—
—
—
—
—
—
—
—
OSTDE
—
—
—
—
Bit
30/22/14/6
—
—
—
—
—
—
—
—
—
—
—
MSTPA14
—
MSTPB30
—
—
—
—
—
—
—
—
—
—
—
OSTDF
—
—
—
Bit
29/21/13/5
—
—
—
—
—
—
—
—
—
—
—
—
—
MSTPB29
MSTPB21
—
—
—
—
—
—
—
—
—
—
—
—
—
MST[2:0]
ADDR[12:0]
—
Bit
Bit
28/20/12/4 27/19/11/3
—
—
—
—
—
—
BOTS
—
KEY[7:0]
—
—
—
—
—
—
—
—
MSTPA28
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
KEY[7:0]
—
—
—
—
—
—
—
ADDR[12:0]
RRS
—
Bit
26/18/10/2
—
—
—
—
Bit
25/17/9/1
—
MD1
—
—
—
—
—
—
—
—
STS[4:0]
—
—
—
—
—
MSTPA17
—
MSTPA9
—
—
—
—
—
MSTPB17
—
—
—
—
—
—
—
—
—
—
—
—
ICK[3:0]
—
—
PCK[3:0]
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Bit
24/16/8/0
—
MD0
—
IROM
ROME
—
RAME
—
MSTPA24
MSTPA16
—
—
—
—
—
MSTPB0
—
—
—
MSTPC0
—
—
—
STSCLR
IGAEN
IA
—
—
DTC
DTC
DTC
MPU
DTCADMOD
—
—
—
—
—
—
—
SHORT
DTCST
—
—
—
—
—
—
—
DTCST
DTCSTS
ACT
—
—
—
—
—
—
—
VECN[7:0]
RSPAGE0
RSPN[27:0]
RSPN[27:0]
RSPN[27:0]
RSPN[27:0]
—
—
—
—
R01DS0096EJ0200 Rev.2.00
Jan 10, 2014
Page 68 of 134