RX63N_15 Datasheet, PDF (60/210 Pages) Renesas Technology Corp – Renesas MCUs

RX63N Group, RX631 Group
1. Overview
Table 1.9
List of Pins and Pin Functions (100-Pin TFLGA) (5/5)
Pin No.
100-pin
TFLGA
K2
Power Supply
Clock
System
Control
I/O Port
P22
K3
P20
Bus
EXDMAC
EDREQ0
Timers
Communications
(MTU, TPU,
TMR, PPG,
RTC, POE)
(ETHERC, SCIc,
SCId, RSPI, RIIC,
CAN, IEB, USB)
MTIOC3B/
MTCLKC/
TIOCC3/TMO0/
PO2
SCK0/USB0_DRPD
MTIOC1A/
TIOCB3/
TMRI0/PO0
TXD0/SMOSI0/
SSDA0/USB0_ID
Interrupt
IRQ8
K4
P14
MTIOC3A/
MTCLKA/
TIOCB5/
TCLKA/TMRI2/
PO15
CTS1#/RTS1#/
SS1#/CTX1/
USB0_DPUPE/
USB0_OVRCURA
IRQ4
K5
USB0_DM
K6
USB0_DP
K7
P51
WR1#/BC1#/
SCK2/SSLB2
WAIT#
K8
PC5
A21/CS2#/ MTIOC3B/
SCK8/RSPCKA/
WAIT#
MTCLKD/
ET_ETXD2
TMRI2/PO29
K9
PC3
A19
MTIOC4D/
TXD5/SMOSI5/
TCLKB/PO24 SSDA5/IETXD/
ET_TX_ER
K10
PC2
A18
MTIOC4B/
RXD5/SMISO5/
TCLKA/PO21 SSCL5/SSLA3/
IERXD/ET_RX_DV
S12AD
AD
DA
Note 1. Enabled only for the ROM capacity of 768 Kbytes or more.
Note 2. The BCLK function is multiplexed with the I/O port function for pin P53, so the port function is not available if the external bus is
enabled.
R01DS0098EJ0180 Rev.1.80
May 13, 2014
Page 60 of 208