RX63N_15 Datasheet, PDF (19/210 Pages) Renesas Technology Corp – Renesas MCUs

RX63N Group, RX631 Group
1.4 Pin Functions
Table 1.4 lists the pin functions.
Table 1.4
Pin Functions (1/6)
Classifications
Power supply
Pin Name
VCC
VCL
VSS
VBATT
Clock
Operating mode control
XTAL
EXTAL
BCLK
SDCLK
XCOUT
XCIN
MD
System control
RES#
EMLE
On-chip emulator
Address bus
Data bus
Multiplexed bus
BSCANP
FINEC
FINED
TRST#
TMS
TDI
TCK
TDO
TRCLK
TRSYNC
TRDATA0 to TRDATA3
A0 to A23
D0 to D31
A0/D0 to A15/D15
1. Overview
I/O
Input
Input
Input
Input
Output
Input
Output
Output
Output
Input
Input
Input
Input
Input
Input
I/O
Input
Input
Input
Input
Output
Output
Output
Output
Output
I/O
I/O
Description
Power supply pin. Connect it to the system power supply.
Connect this pin to VSS via a 0.1-µF capacitor. The capacitor
should be placed close to the pin.
Connect this pin to VSS via a 0.1-F capacitor. The capacitor
should be placed close to the pin.
Ground pin. Connect it to the system power supply (0 V).
Backup power pin. When the battery backup function is not to
be used, connect it to the VCC pin.
Pins for a crystal resonator. An external clock signal can be
input through the EXTAL pin.
Outputs the external bus clock for external devices.
Outputs the clock dedicated for the SDRAM.
Input/output pins for the subclock oscillator. Connect a crystal
resonator between XCOUT and XCIN.
Pins for setting the operating mode. The signal levels on these
pins must not be changed during operation.
Reset signal input pin. This LSI enters the reset state when this
signal goes low.
Input pin for the on-chip emulator enable signal. When the on-
chip emulator is used, this pin should be driven high. When not
used, it should be driven low.
Boundary scan enable pin. Boundary scan is enabled when this
pin goes high. When not used, it should be driven low.
Fine interface clock pin
Fine interface pin
On-chip emulator or boundary scan pins. When the EMLE pin is
driven high, these pins are dedicated for the on-chip emulator.
This pin outputs the clock for synchronization with the trace
data.
This pin indicates that output from the TRDATA0 to TRDATA3
pins is valid.
These pins output the trace information.
Output pins for the address.
Input and output pins for the bidirectional data bus.
Address/data multiplexed bus
R01DS0098EJ0180 Rev.1.80
May 13, 2014
Page 19 of 208