RX63N_15 Datasheet, PDF (18/210 Pages) Renesas Technology Corp – Renesas MCUs

RX63N Group, RX631 Group
1.3 Block Diagram
Figure 1.2 shows a block diagram.
ROM
RAM
RX CPU
MPU
Clock
generati
on circuit
PDC
ETHERC
EDMAC
ICUb
DTCa
DMACA ×
4ch
EXDMACa
1. Overview
DEU
E2 Data Flash
WDTA
IWDTa
CRC
SCIc × 12 ch
SCId × 1 ch
USB 2.0 host/function module
USB 2.0 function module
RSPI (unit 0)
RSPI (unit 1)
RSPI (unit 2)
CAN × 3 ch
MTU2a × 6 ch
POE2a
TPUa × 6 ch (unit 0)
TPUa × 6 ch (unit 1)
PPG (unit 0)
PPG (unit 1)
TMR × 2 ch (unit 0)
TMR × 2 ch (unit 1)
CMT × 2 ch (unit 0)
CMT × 2 ch (unit 1)
RTCa
RIIC × 4ch
IEB
12-bit ADC × 21 ch
10-bit ADC × 8 ch
10-bit DAC × 2 ch
Temperature sensor
BSC
External bus
Port 0
Port 1
Port 2
Port 3
Port 4
Port 5
Port 6
Port 7
Port 8
Port 9
Port A
Port B
Port C
Port D
Port E
Port F
Port G
Port H
Port J
ETHERC : Ethernet controller
EDMAC : DMA controller for Ethernet controller
ICUb
: Interrupt controller
DTCa
: Data transfer controller
DMACA : DMA controller
EXDMACa : EXDMA controller
BSC
: Bus controller
WDTA : Watchdog timer
IWDTa : Independent watchdog timer
CRC
: CRC (cyclic redundancy check) calculator
SCIc, SCId : Serial communications interface
MPU
: Memory protection unit
Figure 1.2
Block Diagram
R01DS0098EJ0180 Rev.1.80
May 13, 2014
RSPI : Serial peripheral interface
CAN : CAN module
MTU2a : Multi-function timer pulse unit 2
POE2a : Port output enable 2
TPUa : 16-bit timer pulse unit
PPG : Programmable pulse generator
TMR : 8-bit timer
CMT : Compare match timer
RTCa : Realtime clock
RIIC : I²C bus interface
IEB : IEBus controller
DEU : Data encryption unit
PDC : Parallel data capture unit
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