RX63N_15 Datasheet, PDF (190/210 Pages) Renesas Technology Corp – Renesas MCUs

RX63N Group, RX631 Group
5. Electrical Characteristics
5.11 ROM (Flash Memory for Code Storage) Characteristics
Table 5.36 ROM (Flash Memory for Code Storage) Characteristics (1)
Conditions: VCC = AVCC0 = VREFH = VCC_USB = 2.7 to 3.6V, VREFH0 = 2.7V to AVCC0
VSS = AVSS0 = VREFL/VREFL0 = VSS_USB = 0V
Temperature range for the programming/erasure operation: T_a = T_opr
Item
Reprogram/erasure cycle*¹
Data hold time
Symbol
N_PEC
t_DRP
min
1000
30*²
typ
—
—
max
—
—
Unit
Times
Year
Condition
Ta = +85°C
Note 1. Definition of reprogram/erase cycle:
The reprogram/erase cycle is the number of erasing for each block. When the reprogram/erase cycle is n times (n = 1000),
erasing can be performed n times for each block. For instance, when 256-byte programming is performed 16 times for different
addresses in 4-Kbyte block and then the entire block is erased, the reprogram/erase cycle is counted as one. However,
programming the same address for several times as one erasing is not enabled (overwriting is prohibited).
Note 2. The result obtained from the reliability test.
Table 5.37 ROM (Flash Memory for Code Storage) Characteristics (2)
Conditions: VCC = AVCC0 = VREFH = VCC_USB = 2.7 to 3.6 V, VREFH0 = 2.7 V to AVCC0
VSS = AVSS0 = VREFL/VREFL0 = VSS_USB = 0 V
Temperature range for the programming/erasure operation: T_a = T_opr
Item
Symbol
Programming time
N_PEC  100 times
128 bytes
4 Kbytes
16 Kbytes
Programming time
N_PEC > 100 times
128 bytes
4 Kbytes
16 Kbytes
Erasure time
N_PEC  100 times
4 Kbytes
16 Kbytes
Erasure time
N_PEC > 100 times
4 Kbytes
16 Kbytes
Suspend delay time during programming
First suspend delay time during erasure
(in suspend priority mode)
t_P128
t_P4K
t_P16K
t_P128
t_P4K
t_P16K
t_E4K
t_E16K
t_E4K
t_E16K
t_SPD
t_SESD1
Second suspend delay time during erasure t_SESD2
(in suspend priority mode)
Suspend delay time during erasure
(in erasure priority mode)
t_SEED
FCU reset time
t_FCUR
FCLK = 4 MHz
Min.
Typ.
Max.
—
2.8
28
—
63
140
—
252
560
—
3.4
33.6
—
75.6
168
—
302.4 672
—
50
120
—
200
480
—
60
144
—
240
576
—
—
400
—
—
300
—
—
1.7
—
—
1.7
35
—
—
20 MHz ≤ FCLK ≤ 50 MHz
Unit
Min.
Typ.
Max.
—
1
10
ms
—
23
50
ms
—
90
200
ms
—
1.2
12
ms
—
27.6
60
ms
—
108
240
ms
—
25
60
ms
—
100
240
ms
—
30
72
ms
—
120
288
ms
—
—
120
μs
—
—
120
μs
—
—
1.7
ms
—
—
1.7
ms
35
—
—
μs
R01DS0098EJ0180 Rev.1.80
May 13, 2014
Page 190 of 208