English
Language : 

RX63N_15 Datasheet, PDF (116/210 Pages) Renesas Technology Corp – Renesas MCUs
RX63N Group, RX631 Group
4. I/O Registers
Table 4.1
List of I/O Registers (Address Order) (37/50)
Address
0009 1428h
0009 142Ch
0009 1820h
to 0009
183Fh
0009 1840h
0009 1842h
0009 1844h
0009 1848h
0009 1849h
0009 184Ah
0009 184Bh
0009 184Ch
0009 184Dh
0009 184Eh
0009 184Fh
0009 1850h
0009 1851h
0009 1852h
0009 1853h
0009 1854h
0009 1856h
0009 1858h
0009 2200h
to
0009 23FFh
0009 2400h
to
0009 241Fh
0009 2420h
0009 2424h
0009 2428h
0009 242Ch
0009 2820h
to
0009 283Fh
0009 2840h
0009 2842h
0009 2844h
0009 2848h
0009 2849h
0009 284Ah
0009 284Bh
0009 284Ch
0009 284Dh
0009 284Eh
0009 284Fh
0009 2850h
0009 2851h
0009 2852h
0009 2853h
0009 2854h
0009 2856h
0009 2858h
Module
Symbol
CAN1
CAN1
CAN1
CAN1
CAN1
CAN1
CAN1
CAN1
CAN1
CAN1
CAN1
CAN1
CAN1
CAN1
CAN1
CAN1
CAN1
CAN1
CAN1
CAN1
CAN1
CAN2
CAN2
CAN2
CAN2
CAN2
CAN2
CAN2
CAN2
CAN2
CAN2
CAN2
CAN2
CAN2
CAN2
CAN2
CAN2
CAN2
CAN2
CAN2
CAN2
CAN2
CAN2
CAN2
CAN2
CAN2
Register Name
Mask invalid register
Mailbox interrupt enable register
Message control registers 0 to 31
Control register
Status register
Bit configuration register
Receive FIFO control register
Receive FIFO pointer control register
Transmit FIFO control register
Transmit FIFO pointer control register
Error interrupt enable register
Error interrupt factor judge register
Receive error count register
Transmit error count register
Error code store register
Channel search support register
Mailbox search status register
Mailbox search mode register
Time stamp register
Acceptance filter support register
Test control register
Mailbox registers 0 to 31
Mask register 0 to 7
FIFO received ID compare register 0
FIFO received ID compare register 1
Mask invalid register
Mailbox interrupt enable register
Message control registers 0 to 31
Control register
Status register
Bit configuration register
Receive FIFO control register
Receive FIFO pointer control register
Transmit FIFO control register
Transmit FIFO pointer control register
Error interrupt enable register
Error interrupt factor judge register
Receive error count register
Transmit error count register
Error code store register
Channel search support register
Mailbox search status register
Mailbox search mode register
Time stamp register
Acceptance filter support register
Test control register
Register
Symbol
MKIVLR
MIER
MCTL0 to 31
CTLR
STR
BCR
RFCR
RFPCR
TFCR
TFPCR
EIER
EIFR
RECR
TECR
ECSR
CSSR
MSSR
MSMR
TSR
AFSR
TCR
MB0 to 31
MKR0 to 7
FIDCR0
FIDCR1
MKIVLR
MIER
MCTL0 to 31
CTLR
STR
BCR
RFCR
RFPCR
TFCR
TFPCR
EIER
EIFR
RECR
TECR
ECSR
CSSR
MSSR
MSMR
TSR
AFSR
TCR
Number Access
of Bits Size
Number of Access States
Related
ICLKPCLK ICLK<PCLK Function
32
8, 16, 32 2, 3 PCLKB
2 ICLK CAN
32
8, 16, 32 2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
16
8, 16 2, 3 PCLKB
16
8, 16 2, 3 PCLKB
32
8, 16, 32 2, 3 PCLKB
8
8
2, 3 PCLKB
8
8
2, 3 PCLKB
8
8
2, 3 PCLKB
8
8
2, 3 PCLKB
8
8
2, 3 PCLKB
8
8
2, 3 PCLKB
8
8
2, 3 PCLKB
8
8
2, 3 PCLKB
8
8
2, 3 PCLKB
8
8
2, 3 PCLKB
8
8
2, 3 PCLKB
8
8
2, 3 PCLKB
16
8, 16 2, 3 PCLKB
16
8, 16 2, 3 PCLKB
8
8
2, 3 PCLKB
128
8, 16, 32 2, 3 PCLKB
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
32
8, 16, 32 2, 3 PCLKB
2 ICLK
32
8, 16, 32 2, 3 PCLKB
2 ICLK
32
8, 16, 32 2, 3 PCLKB
2 ICLK
32
8, 16, 32 2, 3 PCLKB
2 ICLK
32
8, 16, 32 2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
16
8, 16 2, 3 PCLKB
2 ICLK
16
8, 16 2, 3 PCLKB
2 ICLK
32
8, 16, 32 2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
16
16
2, 3 PCLKB
2 ICLK
16
16
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
R01DS0098EJ0180 Rev.1.80
May 13, 2014
Page 116 of 208