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RX63N_15 Datasheet, PDF (5/210 Pages) Renesas Technology Corp – Renesas MCUs | |||
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RX63N Group, RX631 Group
1. Overview
Table 1.1
Outline of Specifications (4/6)
Classification
Timers
Module/Function
Description
16-bit timer pulse unit
(TPUa)
ï· (16 bits x 6 channels) x 2 unit
ï· Maximum of 16 pulse-input/output possible
ï· Select from among seven or eight counter-input clock signals for each channel
ï· Input capture/output compare function
ï· Output of PWM waveforms in up to 15 phases in PWM mode
ï· Buffered operation and phase-counting mode (two phase encoder input) depending on
the channel
ï· Support for cascade-connected operation (32 bits x 2 channels)
ï· PPG output trigger can be generated
ï· Capable of generating conversion start triggers for the A/D converters
ï· Signals from the input capture pins are input via a digital filter
ï· Clock frequency measuring method
Multi-function timer
pulse unit 2 (MTU2a)
ï· (16 bits x 6 channels) x 1 unit
ï· Time bases for the 6 Ã 16-bit timer channels can be provided via up to sixteen pulse-input/
output lines and three pulse-input lines
ï· Select from among eight counter-input clock signals for each channel (PCLK/1, PCLK/4,
PCLK/16, PCLK/64, MTCLKA, MTCLKB, MTCLKC, MTCLKD) other than channel 5, for
which only four signals are available.
ï· Input capture function
ï· 21 output compare/input capture registers
ï· Complementary PWM output mode
ï· Reset synchronous PWM mode
ï· Phase-counting mode
ï· Generation of triggers for A/D converter conversion
ï· Digital filter
ï· Signals from the input capture pins are input via a digital filter
ï· PPG output trigger can be generated
ï· Clock frequency measuring function
Frequency measuring The MTU or unit 0 TPU module can be used to monitor the main clock, subclock,
method (MCK)
HOCO clock, LOCO clock, and PLL clock for abnormal frequencies.
Port output enable 2 Controls the high-impedance state of the MTUâs waveform output pins
(POE2a)
Programmable pulse
generator (PPG)
ï· (4 bits x 4 groups) x 2 units
ï· Pulse output with the MTU2 or TPU output as a trigger
ï· Maximum of 32 pulse-output possible
8-bit timers (TMR)
ï· (8 bits x 2 channels) x 2 units
ï· Select from among seven internal clock signals (PCLK/1, PCLK/2, PCLK/8, PCLK/32,
PCLK/64, PCLK/1024, PCLK/8192) and one external clock signal
ï· Capable of output of pulse trains with desired duty cycles or of PWM signals
ï· The 2 channels of each unit can be cascaded to create a 16-bit timer
ï· Generation of triggers for A/D converter conversion
ï· Capable of generating baud-rate clocks for SCI5, SCI6, and SCI12
Compare match timer ï· (16 bits x 2 channels) x 2 units
(CMT)
ï· Select from among four internal clock signals (PCLK/8, PCLK/32, PCLK/128, PCLK/512)
Realtime clock
(RTCa)
ï· Clock sources: Main clock, subclock
ï· Clock and calendar functions
Interrupt sources: Alarm interrupt, periodic interrupt, and carry interrupt
ï· Battery backup operation
ï· Time-capture facility for three values
Watchdog timer
(WDTA)
ï· 14 bits x 1 channel
ï· Select from among 6 counter-input clock signals (PCLK/4, PCLK/64, PCLK/128, PCLK/
512, PCLK/2048, PCLK/8192)
Independent
watchdog timer
(IWDTa)
ï· 14 bits x 1 channel
ï· Counter-input clock: IWDT-dedicated on-chip oscillator
ï· Dedicated clock/1, dedicated clock/16, dedicated clock/32, dedicated clock/64, dedicated
clock/128, dedicated clock/256
R01DS0098EJ0180 Rev.1.80
May 13, 2014
Page 5 of 208
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