RX63N_15 Datasheet, PDF (23/210 Pages) Renesas Technology Corp – Renesas MCUs

RX63N Group, RX631 Group
1. Overview
Table 1.4
Pin Functions (5/6)
Classifications
Ethernet controller
Pin Name
ET_MDIO
Parallel data capture unit
(PDC)
USB power pins
PIXCLK
VSYNC
HSYNC
PIXD7 to PIXD0
PCKO
VCC_USB
VSS_USB
USB 2.0 host/function
module
USB0_DP, USB1_DP
USB0_DM, USB1_DM
USB0_VBUS, USB1_VBUS
CAN module
Serial peripheral
interface
USB0_EXICEN
USB0_VBUSEN
USB0_OVRCURA,
USB0_OVRCURB,
USB0_ID
USB0_DPUPE,
USB1_DPUPE
USB0_DPRPD
USB0_DRPD
CRX0 to CRX2
CTX0 to CTX2
RSPCKA, RSPCKB
RSPCKC
MOSIA, MOSIB, MOSIC
I/O
I/O
Input
Input
Input
Input
Output
Input
Input
I/O
I/O
Input
Output
Output
Input
Input
Output
Output
Output
Input
Output
I/O
I/O
Description
Inputs or outputs bidirectional signals for exchange of
management information between the RX63N Group and the
PHY-LSI.
Parallel data transfer clock
Vertical synchronization signal
Horizontal synchronization signal
8-bit data
Outputs parallel data transfer clock signal
Power supply pin. When the USB is not to be used, connect it to
the VCC pin.
Ground pin. When the USB is not to be used, connect it to the
VSS pin.
Inputs or outputs USB transceiver D+ data.
Inputs or outputs USB transceiver D- data.
Input pins for detection of connection and disconnection of the
USB cable.
Output pin for control the low power of the OTG chip.
Supply enable pin of VBUS (5 V) for the OTG chip.
Input pin for detection of external over current.
ID input pin of mini-AB connector at the OTG operation.
Pull-up control pins of the D+ signal at the function operation.
Pull-down control pins of the D+ signal at the host operation.
Pull-down control pins of the D- signal at the host operation.
Input pin.
Output pin.
Clock input/output pin.
Inputs or outputs data output from the master.
IEBus controller
Realtime clock
12-bit A/D converter
10-bit A/D converter
D/A converter
MISOA, MISOB, MISOC
SSLA0, SSLB0, SSLC0
SSLA1 to SSLA3
SSLB1 to SSLB3
SSLC1 to SSLC3
IERXD
IETXD
RTCOUT
RTCIC0 to RTCIC2
AN000 to AN020
ADTRG0#
AN0 to AN7
ANEX0
ANEX1
ADTRG#
DA0, DA1
I/O
I/O
Output
Inputs or outputs data output from the slave.
Input or output pins slave selection
Output pins slave selection
Input
Output
Output
Input
Input
Input
Input
Output
Input
Input
Output
Input pin for data reception.
Output pin for data transmission.
Output pin for 1-Hz clock.
Time capture event input pin
Input pins for the analog signals to be processed by the A/D
converter.
Input pins for the external trigger signals that start the A/D
conversion.
Input pins for the analog signals to be processed by the A/D
converter.
Extended analog output pin
Extended analog input pin
Input pins for the external trigger signals that start the A/D
conversion.
Output pins for the analog signals to be processed by the D/A
converter.
R01DS0098EJ0180 Rev.1.80
May 13, 2014
Page 23 of 208