N25Q128 Datasheet, PDF (159/185 Pages) Numonyx B.V – 128-Mbit, 1.8 V, multiple I/O, 4-Kbyte subsector erase on boot sectors, XiP enabled, serial flash memory with 108 MHz SPI bus interface

N25Q128 - 1.8 V
Instructions
9.3.25
Deep Power-down (DP)
The Deep-Power-down (DP) instruction sets the device in Deep Power-down mode. Apart
form the parallelizing of the instruction code on the four pins DQ0, DQ1, DQ2 and DQ3, the
instruction functionality is exactly the same as the Deep Power-down (DP) instruction of the
Extended SPI protocol. The instruction sequence is shown in Figure 100.
Figure 100. Deep Power-down instruction sequence
S
C
DQ0
DQ1
DQ2
DQ3
01
Instruction
t_DP
Standby mode Deep power-down mode
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