N25Q128 Datasheet, PDF (150/185 Pages) Numonyx B.V – 128-Mbit, 1.8 V, multiple I/O, 4-Kbyte subsector erase on boot sectors, XiP enabled, serial flash memory with 108 MHz SPI bus interface

Instructions
N25Q128 - 1.8 V
Figure 91. Write to Lock Register instruction sequence QIO-SPI
S
0123456789
C
Instruction 24-Bit Address
Lock Register In
DQ0
20 16 12 8 4 0 4 0
DQ1
21 17 13 9 5 1 5 1
DQ2
22 18 14 10 6 2 6 2
DQ3
23 19 15 11 7 3 7 3
9.3.17
Quad_Write_LR
Read Flag Status Register
The Read Flag Status Register (RFSR) instruction allows the Flag Status Register to be
read.
Apart form the parallelizing of the instruction code and the output data on the four pins DQ0,
DQ1, DQ2 and DQ3, the instruction functionality is exactly the same as the Read Flag
Status Register (RFSR) instruction of the Extended SPI protocol, please refer to
Section 9.1.26: Read Flag Status Register for further details.
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