N25Q128 Datasheet, PDF (116/185 Pages) Numonyx B.V – 128-Mbit, 1.8 V, multiple I/O, 4-Kbyte subsector erase on boot sectors, XiP enabled, serial flash memory with 108 MHz SPI bus interface

Instructions
N25Q128 - 1.8 V
9.2.2
Dual Command Fast Read (DCFR)
The Dual Command Fast Read (DCFR) instruction allows to read the memory in DIO-SPI
protocol, parallelizing the instruction code, the address and the output data on two pins
(DQ0 and DQ1). The Dual Command Fast Read (DCFR) instruction can be issued, when
the device is set in DIO-SPI mode, by sending to the memory indifferently one of the 3
instructions codes: 0Bh, 3Bh or BBh, the effect is exactly the same. The 3 instruction codes
are all accepted to help the application code porting from Extended SPI protocol to DIO-SPI
protocol.
Apart for the parallelizing on two pins of the instruction code, the Dual Command Fast Read
instruction functionality is exactly the same as the Dual I/O Fast Read of the Extended SPI
protocol, please refer to Section 9.1.5: Dual I/O Fast Read for further details.
Figure 45. Dual Command Fast Read instruction and data-out sequence DIO-SPI
S
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33
C
Instruction
24-Bit Address
DQ0
22 20 18 16 14 12 10 8 6 4 2 0
Dummy cycles
Data Out 1
6420
Data Out n
6420
DQ1
9.2.3
Note:
23 21 19 17 15 13 11 9 7 5 3 1
7531
MSB
7531
MSB
Dual_Command_Fast_Read
Read OTP (ROTP)
The Read OTP (ROTP) instruction is used to read the 64 bytes OTP area in the DIO-SPI
protocol. The instruction functionality is exactly the same as the Read OTP instruction of the
Extended SPI protocol; the only difference is that in the DIO-SPI protocol instruction code,
address and output data are all parallelized on the two pins DQ0 and DQ1.
The dummy bits can not be parallelized since these clock cycles are requested to perform
the internal reading operation.
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