N25Q128 Datasheet, PDF (148/185 Pages) Numonyx B.V – 128-Mbit, 1.8 V, multiple I/O, 4-Kbyte subsector erase on boot sectors, XiP enabled, serial flash memory with 108 MHz SPI bus interface

Instructions
Figure 89. Write Status Register instruction sequence QIO-SPI
S
0123
C
Status Register In
DQ0
40
N25Q128 - 1.8 V
DQ1
51
DQ2
62
DQ3
73
9.3.15
Quad_Write_SR
Read Lock Register (RDLR)
The Read Lock Register instructions is used to read the lock register content.
Apart form the parallelizing of the instruction code, the address and the output data on the
four pins DQ0, DQ1, DQ2 and DQ3, the instruction functionality is exactly the same as the
Read Lock Register (RDLR) instruction of the Extended SPI protocol, please refer to
Section 9.1.24: Read Lock Register (RDLR) for further details.
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