NS32FX100-15 Datasheet, PDF (76/94 Pages) National Semiconductor (TI) – System Controller

4 0 Device Specifications (Continued)
4 6 2 Timing Tables (Continued)
4 6 2 2 Input Signal Requirements
Symbol Figure Description
Reference
Condition
t_CTp
4-8 CTTL Clock
Period
R E CTTL to
Next R E CTTL
t_CTh
4-8 CTTL High
Time
At 2 0V
(Both Edges)
t_CTl
4-8 CTTL Low
Time
At 0 8V
(Both Edges)
t_CTr
4-8 CTTL Rise
0 8V to 2 0V
Time (Note 1)
on R E CTTL
t_CTf
4-8 CTTL Fall
2 0V to 0 8V
Time (Note 1)
on F E CTTL
t_XFp
4-8 FOSCI Clock
R E FOSCI to
Period
Next R E FOSCI
t_XFh
4-8 FOSCI High
Time
At 3 8V
(Both Edges)
t_XFl
4-8 FOSCI Low
At 1 0V
Time
(Both Edges)
t_XSp
4-8 SOSCI Clock
R E SOSCI to
Period (Note 2)
Next R E SOSCI
t_XSh
4-8 SOSCI High
At 3 8V
Time
(Both Edges)
t_XSl
4-8 SOSCI Low
At 1 0V
Time
(Both Edges)
t_CTCd
4-8 CCLK to CTTL
Delay
3 8V on R E
CTTL to R E
CCLK
t_ALs
4-9 AD0–AD15 Setup Before R E
CTTL T2
t_ALh
4-9 AD0–AD15 Hold After R E
CTTL T2
t_AHs
4-9 A16–A23 Setup Before R E
CTTL T2
t_AHh
4-9 A16–A23 Hold
After R E
CTTL next T1 i
t_RSTw
4-22 RST Pulse
Width
At 0 8V (both
edges) PFAIL e 1
Note 1 Due to tester conditions this parameter is not 100% tested
Note 2 Tested at 32 00 kHz only
NS32FX200-15
Min
Max
66
544
t_{CTp 2}
b 6 ns
t_{CTp 2}
b 6 ns
6
NS32FX200-20
Min
Max
50
544
t_{CTp 2}
b 5 ns
t_{CTp 2}
b 5 ns
5
NS32FX200-25
Min
Max
40
544
t_{CTp 2}
b 5 ns
t_{CTp 2}
b 4 ns
4
6
5
4
33
34
25
34
20
34
t_{XFp 2}
b 5 ns
t_{XFp 2}
b 5 ns
t_{XFp 2}
b 4 ns
t_{XFp 2}
b 4 ns
t_{XFp 2}
b 3 ns
t_{XFp 2}
b 3 ns
32 768 kHz or 455 kHz
t_{XSp 2}
b 5 ns
t_{XSp 2}
b 5 ns
t_{XSp 2}
b 4 ns
t_{XSp 2}
b 4 ns
t_{XSp 2}
b 3 ns
t_{XSp 2}
b 3 ns
35
35
30
51
36
27
0
0
0
51
36
27
0
0
0
25
25
25
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
76