NS32FX100-15 Datasheet, PDF (74/94 Pages) National Semiconductor (TI) – System Controller

4 0 Device Specifications (Continued)
4 6 2 Timing Tables (Continued)
4 6 2 1 Output Signals Internal Propagation Delays (Continued)
Symbol Figure
Description
Reference
Condition
t_SMPHa
4-23
SMPH0–3 Signal
Active
After R E
CTTL
t_SMPHia
4-23
SMPH0–3 Signal
Inactive
After R E
CTTL
t_STBa
4-21
STB0–3 Signal
Active
After R E
CTTL
t_STBia
4-21
STB0–3 Signal
Inactive
After R E
CTTL
t_PMPHa
4-21
PMPH0-3 Signal
Active
After R E
CTTL
t_PMPHia
4-21
PMPH0–3 Signal
Inactive
After R E
CTTL
t_BUZCLKa
4-26
BUZCLK Signal
Active
After R E
CTTL
t_BUZCLKia
4-26
BUZCLK Signal
Inactive
After R E
CTTL
t_WDTa
4-22
WDT Signal
Active
After R E
CTTL
t_INTRa
4-18
INTR Signal
Active
After R E
CTTL
t_INTRia
4-18
INTR Signal
Inactive
After R E
CTTL
t_MWSKa
4-25
MWSK Signal
Active
After R E
CTTL
t_MWSKia
4-25
MWSK Signal
Active
After R E
CTTL
t_DMAKa
4-16
DMAK0–3 Signal
Active
After R E
CTTL
t_DMAKia
4-16
DMAK0–3 Signal
Inactive
After R E
CTTL
t_PEXTa
4-26
PEXT Signal
Active
After R E
CTTL
t_PEXTia
4-26
PEXT Signal
Inactive
After R E
CTTL
t_PDOEv
4-21
PDO Signal Valid
After F E PCLK
(External Clock Mode) Input
t_PDOIv
4-21
PDO Signal Valid
After R E CTTL
(Internal Clock Mode) (Note 1)
t_PCLKa
4-21
PCLK Signal
Active
After R E
CTTL
t_PCLKia
4-21
PCLK Signal
Inactive
After R E
CTTL
Note 1 PDO is changed on the first CTTL R E following the PCLK F E
NS32FX200-15
Min Max
24
24
t_CTp2
t_{CTp 2}
t_CTp2
a 24
t_{CTp 2}
a 24
24
24
t_{CTp 2}
t_{CTp 2}
t_{CTp 2}
a 24
t_{CTp 2}
a24
24
t_{CTp 2}
t_{CTp 2}
t_{CTp 2}
t_{CTp 2}
t_{CTp 2}
a 24
t_{CTp 2}
a 24
t_{CTp 2}
a 24
t_{CTp 2}
a 24
24
24
24
24
33
26
t_{CTp 2}
t_{CTp 2}
t_{CTp 2}
a 24
t_{CTp 2}
a 24
NS32FX200-20
Min Max
22
22
t_CTp2
t_{CTp 2}
t_CTp2
a 22
t_{CTp 2}
a 22
22
22
t_{CTp 2}
t_{CTp 2}
t_{CTp 2}
a 22
t_{CTp 2}
a22
22
t_{CTp 2}
t_{CTp 2}
t_{CTp 2}
t_{CTp 2}
t_{CTp 2}
a 22
t_{CTp 2}
a 22
t_{CTp 2}
a 22
t_{CTp 2}
a 22
22
22
22
22
33
24
t_{CTp 2}
t_{CTp 2}
t_{CTp 2}
a 22
t_{CTp 2}
a 22
NS32FX200-25
Min Max
20
20
t_CTp2
t_{CTp 2}
t_CTp2
a 20
t_{CTp 2}
a 20
20
20
t_{CTp 2}
t_{CTp 2}
t_{CTp 2}
a 20
t_{CTp 2}
a20
20
t_{CTp 2}
t_{CTp 2}
t_{CTp 2}
t_{CTp 2}
t_{CTp 2}
a 20
t_{CTp 2}
a 20
t_{CTp 2}
a 20
t_{CTp 2}
a 20
20
20
22
22
33
22
t_{CTp 2}
t_{CTp 2}
t_{CTp 2}
a 20
t_{CTp 2}
a 20
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
74