NS32FX100-15 Datasheet, PDF (44/94 Pages) National Semiconductor (TI) – System Controller

2 0 Architecture (Continued)
PCDI Port C data in Read only
Holds the current value of the pins (latched once
each CTTL)
7
6
5
4
3
2
1
0
SBPYS PCLK
SNH
UREN UTXD MWSO
PIO1 PIO0
DMRQ2 DMRQ1 DMRQ0
PCDO
Port C data out
Each bit holds the value driven onto the corre-
sponding output pin when the respective MS bit in
the PCMS register is ‘‘0’’
7
6
5
4
3
2
1
0
SBYPS PCLK SNH
UREN UTXD MWSO
PIO1
DMRQ2 DMRQ1 DMRQ0
PIO0
PCMS Port C module select
7
MS7
6
MS6
5
MS5
4
MS4
3
MS3
2
MS2
1
0
res
MS2 – MS7 The module select bits for port C I O
pins
0 Port is selected
The value of the corresponding bit in the PCDO
register is driven on the respective pin when
Port C is enabled through the PCEN register
1 Module is selected
The value of the pin specified by the corre-
sponding bit in the PCDO register is driven to
from the appropriate module Printer Scanner
DMA
Upon reset this register is cleared to ‘‘0’’
When the Scanner Printer or DMA module is activated
through the MCFG register MS2 MS3 and MS4 must be set
to ‘‘1’’ as detailed in the following table
Module
DMA
Scanner
Port
MCFG EDMA0
0
1
X
MS2
1
1
0
Module
DMA
Printer
Port
MCFG EPBMS
0
1
X
MS3
1
1
0
Module
DMA
Scanner
Port
MCFG ESCAN
0
1
X
MS4
1
1
0
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