NS32FX100-15 Datasheet, PDF (57/94 Pages) National Semiconductor (TI) – System Controller

3 0 System Interface (Continued)
TL EE 11331 – 42
FIGURE 3-10 Zone 2 (DRAM) Read Transaction Zero Wait State
( ) Note OE or WEi according to other Zone 0 or Zone 1 access figures
FIGURE 3-11 Zones 0 1 Access Delayed by a Refresh Transaction (No Wait)
TL EE 11331 – 43
57