MC68HC908GZ8 Datasheet, PDF (77/344 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Data Sheet — MC68HC908GZ8
Section 6. Break Module (BRK)
6.1 Introduction
This section describes the break module. The break module can generate a break
interrupt that stops normal program flow at a defined address to enter a
background program.
6.2 Features
Features of the break module include:
• Accessible input/output (I/O) registers during the break Interrupt
• Central processor unit (CPU) generated break interrupts
• Software-generated break interrupts
• Computer operating properly (COP) disabling during break interrupts
6.3 Functional Description
When the internal address bus matches the value written in the break address
registers, the break module issues a breakpoint signal (BKPT) to the system
integration module (SIM). The SIM then causes the CPU to load the instruction
register with a software interrupt instruction (SWI). The program counter vectors to
$FFFC and $FFFD ($FEFC and $FEFD in monitor mode).
The following events can cause a break interrupt to occur:
• A CPU generated address (the address in the program counter) matches
the contents of the break address registers.
• Software writes a logic 1 to the BRKA bit in the break status and control
register.
When a CPU generated address matches the contents of the break address
registers, the break interrupt is generated. A return-from-interrupt instruction (RTI)
in the break routine ends the break interrupt and returns the microcontroller unit
(MCU) to normal operation.
Figure 6-1 shows the structure of the break module.
Figure 6-2 provides a summary of the I/O registers.
MC68HC908GZ8
MOTOROLA
Break Module (BRK)
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Data Sheet
77