MC68HC908GZ8 Datasheet, PDF (71/344 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Analog-to-Digital Converter (ADC)
I/O Registers
5.8 I/O Registers
These I/O registers control and monitor ADC operation:
• ADC status and control register (ADSCR)
• ADC data register (ADRH and ADRL)
• ADC clock register (ADCLK)
5.8.1 ADC Status and Control Register
Function of the ADC status and control register (ADSCR) is described here.
Address:
Read:
Write:
Reset:
$003C
Bit 7
6
5
4
3
2
1
COCO
AIEN
ADCO ADCH4 ADCH3 ADCH2 ADCH1
0
0
0
1
1
1
1
Figure 5-3. ADC Status and Control Register (ADSCR)
Bit 0
ADCH0
1
COCO — Conversions Complete Bit
In non-interrupt mode (AIEN = 0), COCO is a read-only bit that is set at the end
of each conversion. COCO will stay set until cleared by a read of the ADC data
register. Reset clears this bit.
In interrupt mode (AIEN = 1), COCO is a read-only bit that is not set at the end
of a conversion. It always reads as a logic 0.
1 = Conversion completed (AIEN = 0)
0 = Conversion not completed (AIEN = 0) or CPU interrupt enabled
(AIEN = 1)
AIEN — ADC Interrupt Enable Bit
When this bit is set, an interrupt is generated at the end of an ADC conversion.
The interrupt signal is cleared when the data register is read or the status/control
register is written. Reset clears the AIEN bit.
1 = ADC interrupt enabled
0 = ADC interrupt disabled
ADCO — ADC Continuous Conversion Bit
When set, the ADC will convert samples continuously and update the ADR
register at the end of each conversion. Only one conversion is completed
between writes to the ADSCR when this bit is cleared. Reset clears the ADCO
bit.
1 = Continuous ADC conversion
0 = One ADC conversion
MC68HC908GZ8
MOTOROLA
Analog-to-Digital Converter (ADC)
For More Information On This Product,
Go to: www.freescale.com
Data Sheet
71