MC68HC908GZ8 Datasheet, PDF (32/344 Pages) Motorola, Inc – Microcontrollers

Memory Map
Freescale Semiconductor, Inc.
Addr.
$0000
$0001
$0002
$0003
$0004
$0005
$0006
$0007
$0008
$0009
$000A
Register Name
Port A Data Register ^Read:
(PTA) Write:
See page 202. _Reset:
Port B Data Register ^Read:
(PTB) Write:
See page 204. _Reset:
Port C Data Register ^Read:
(PTC) Write:
See page 207. _Reset:
Port D Data Register ^Read:
(PTD) Write:
See page 210. _Reset:
Data Direction Register A ^Read:
(DDRA) Write:
See page 202. _Reset:
Data Direction Register B ^Read:
(DDRB) Write:
See page 205. _Reset:
Data Direction Register C ^Read:
(DDRC) Write:
See page 208. _Reset:
Data Direction Register D ^Read:
(DDRD) Write:
See page 211. _Reset:
Port E Data Register ^Read:
(PTE) Write:
See page 213. _Reset:
ESCI Prescaler Register ^Read:
(SCPSC) Write:
See page 246. _Reset:
ESCI Arbiter Control ^Read:
Register (SCIACTL) Write:
See page 250. _Reset:
Bit 7
PTA7
PTB7
1
PTD7
DDRA7
0
DDRB7
0
0
0
DDRD7
0
0
PS2
0
AM1
0
6
PTA6
PTB6
PTC6
PTD6
DDRA6
0
DDRB6
0
DDRC6
0
DDRD6
0
0
PS1
0
ALOST
0
5
PTA5
PTB5
PTC5
PTD5
DDRA5
0
DDRB5
0
DDRC5
0
DDRD5
0
PTE5
PS0
0
AM0
0
4
3
PTA4
PTA3
Unaffected by reset
PTB4
PTB3
Unaffected by reset
PTC4
PTC3
Unaffected by reset
PTD4
PTD3
Unaffected by reset
DDRA4 DDRA3
0
0
DDRB4 DDRB3
0
0
DDRC4 DDRC3
0
0
DDRD4 DDRD3
0
0
PTE4
PTE3
Unaffected by reset
PSSB4 PSSB3
0
0
AFIN
ACLK
0
0
2
PTA2
PTB2
PTC2
PTD2
DDRA2
0
DDRB2
0
DDRC2
0
DDRD2
0
PTE2
PSSB2
0
ARUN
0
1
PTA1
PTB1
PTC1
PTD1
DDRA1
0
DDRB1
0
DDRC1
0
DDRD1
0
PTE1
PSSB1
0
AOVFL
0
Bit 0
PTA0
PTB0
PTC0
PTD0
DDRA0
0
DDRB0
0
DDRC0
0
DDRD0
0
PTE0
PSSB0
0
ARD8
0
= Unimplemented
R = Reserved
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 1 of 8)
Data Sheet
32
Memory Map
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MC68HC908GZ8
MOTOROLA