MC68HC908GZ8 Datasheet, PDF (208/344 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Input/Output (I/O) Ports
17.4.2 Data Direction Register C
Data direction register C (DDRC) determines whether each port C pin is an input
or an output. Writing a logic 1 to a DDRC bit enables the output buffer for the
corresponding port C pin; a logic 0 disables the output buffer.
Address:
Read:
Write:
Reset:
$0006
Bit 7
0
6
DDRC6
5
DDRC5
4
DDRC4
3
DDRC3
2
DDRC2
1
DDRC1
0
0
0
0
0
0
0
= Unimplemented
Figure 17-10. Data Direction Register C (DDRC)
Bit 0
DDRC0
0
NOTE:
DDRC6–DDRC0 — Data Direction Register C Bits
These read/write bits control port C data direction. Reset clears
DDRC6–DDRC0, configuring all port C pins as inputs.
1 = Corresponding port C pin configured as output
0 = Corresponding port C pin configured as input
Avoid glitches on port C pins by writing to the port C data register before changing
data direction register C bits from 0 to 1.
Figure 17-11 shows the port C I/O logic.
READ DDRC ($0006)
WRITE DDRC ($0006)
RESET
WRITE PTC ($0002)
V_DD
DDRCx
PTCx
PTCPUEx
READ PTC ($0002)
INTERNAL
PULLUP
DEVICE
PTCx
Data Sheet
208
Figure 17-11. Port C I/O Circuit
When bit DDRCx is a logic 1, reading address $0002 reads the PTCx data latch.
When bit DDRCx is a logic 0, reading address $0002 reads the voltage level on the
pin. The data latch can always be written, regardless of the state of its data
direction bit. Table 17-4 summarizes the operation of the port C pins.
Input/Output (I/O) Ports
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MC68HC908GZ8
MOTOROLA