MC68HC908GZ8 Datasheet, PDF (194/344 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
MSCAN08 Controller (MSCAN08)
16.13.9 MSCAN08 Identifier Acceptance Control Register
Address: $0508
Bit 7
6
5
4
3
Read: 0
Write:
0
0
IDAM1 IDAM0
Reset: 0
0
0
0
0
= Unimplemented
2
1
Bit 0
0
IDHIT1 IDHIT0
0
0
0
Figure 16-23. Identifier Acceptance Control Register (CIDAC)
IDAM1–IDAM0— Identifier Acceptance Mode
The CPU sets these flags to define the identifier acceptance filter organization
(see 16.5 Identifier Acceptance Filter). Table 16-9 summarizes the different
settings. In “filter closed” mode no messages will be accepted so that the
foreground buffer will never be reloaded.
Table 16-9. Identifier Acceptance Mode Settings
IDAM1
0
0
1
1
IDAM0
0
1
0
1
Identifier Acceptance Mode
Single 32-bit acceptance filter
Two 16-bit acceptance filter
Four 8-bit acceptance filters
Filter closed
IDHIT1–IDHIT0— Identifier Acceptance Hit Indicator
The MSCAN08 sets these flags to indicate an identifier acceptance hit (see 16.5
Identifier Acceptance Filter). Table 16-9 summarizes the different settings.
Table 16-10. Identifier Acceptance Hit Indication
IDHIT1
0
0
1
1
IDHIT0
0
1
0
1
Identifier Acceptance Hit
Filter 0 hit
Filter 1 hit
Filter 2 hit
Filter 3 hit
NOTE:
The IDHIT indicators are always related to the message in the foreground buffer.
When a message gets copied from the background to the foreground buffer, the
indicators are updated as well.
The CIDAC register can be written only if the SFTRES bit in the CMCR0 is set.
Data Sheet
194
MSCAN08 Controller (MSCAN08)
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MC68HC908GZ8
MOTOROLA