MC68HC908GZ8 Datasheet, PDF (193/344 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
MSCAN08 Controller (MSCAN08)
Programmer’s Model of Control Registers
16.13.8 MSCAN08 Transmitter Control Register
Address:
Read:
Write:
Reset:
$0507
Bit 7
6
5
4
3
0
0
ABTRQ2 ABTRQ1 ABTRQ0
2
TXEIE2
1
TXEIE1
0
0
0
0
0
0
0
= Unimplemented
Figure 16-22. Transmitter Control Register (CTCR)
Bit 0
TXEIE0
0
NOTE:
NOTE:
ABTRQ2–ABTRQ0 — Abort Request
The CPU sets an ABTRQx bit to request that an already scheduled message
buffer (TXE = 0) be aborted. The MSCAN08 will grant the request if the
message has not already started transmission, or if the transmission is not
successful (lost arbitration or error). When a message is aborted the associated
TXE and the abort acknowledge flag (ABTAK) (see 16.13.7 MSCAN08
Transmitter Flag Register) will be set and an TXE interrupt is generated if
enabled. The CPU cannot reset ABTRQx. ABTRQx is cleared implicitly
whenever the associated TXE flag is set.
1 = Abort request pending
0 = No abort request
The software must not clear one or more of the TXE flags in CTFLG and
simultaneously set the respective ABTRQ bit(s).
TXEIE2–TXEIE0 — Transmitter Empty Interrupt Enable
1 = A transmitter empty (transmit buffer available for transmission) event
results in a transmitter empty interrupt.
0 = No interrupt is generated from this event.
The CTCR register is held in the reset state when the SFTRES bit in CMCR0 is set.
MC68HC908GZ8
MOTOROLA
MSCAN08 Controller (MSCAN08)
For More Information On This Product,
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Data Sheet
193