MC68HC908GZ8 Datasheet, PDF (292/344 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Serial Peripheral Interface (SPI) Module
MISO/MOSI
MASTER SS
SLAVE SS
CPHA = 0
SLAVE SS
CPHA = 1
BYTE 1
BYTE 2
BYTE 3
Figure 21-12. CPHA/SS Timing
NOTE:
When an SPI is configured as a slave, the SS pin is always configured as an input.
It cannot be used as a general-purpose I/O regardless of the state of the MODFEN
control bit. However, the MODFEN bit can still prevent the state of the SS from
creating a MODF error. See 21.13.2 SPI Status and Control Register.
A logic 1 voltage on the SS pin of a slave SPI puts the MISO pin in a
high-impedance state. The slave SPI ignores all incoming SPSCK clocks, even if
it was already in the middle of a transmission.
When an SPI is configured as a master, the SS input can be used in conjunction
with the MODF flag to prevent multiple masters from driving MOSI and SPSCK.
(See 21.7.2 Mode Fault Error.) For the state of the SS pin to set the MODF flag,
the MODFEN bit in the SPSCK register must be set. If the MODFEN bit is low for
an SPI master, the SS pin can be used as a general-purpose I/O under the control
of the data direction register of the shared I/O port. With MODFEN high, it is an
input-only pin to the SPI regardless of the state of the data direction register of the
shared I/O port.
The CPU can always read the state of the SS pin by configuring the appropriate
pin as an input and reading the port data register. See Table 21-3.
SPE SPMSTR
0
X⁽¹⁾⁾
1
0
1
1
1
1
1. X = Don’t care
Table 21-3. SPI Configuration
MODFEN
SPI Configuration
X
Not enabled
X
Slave
0
Master without MODF
1
Master with MODF
State of SS Logic
General-purpose I/O;
SS ignored by SPI
Input-only to SPI
General-purpose I/O;
SS ignored by SPI
Input-only to SPI
Data Sheet
292
Serial Peripheral Interface (SPI) Module
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MC68HC908GZ8
MOTOROLA