MC68HC908GZ8 Datasheet, PDF (171/344 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
MSCAN08 Controller (MSCAN08)
Protocol Violation Protection
16.6.2 Interrupt Vectors
The MSCAN08 supports four interrupt vectors as shown in Table 16-1. The vector
addresses and the relative interrupt priority are dependent on the chip integration
and to be defined.
Table 16-1. MSCAN08 Interrupt Vector Addresses
Function
Wakeup
Error interrupts
Receive
Transmit
Source
WUPIF
RWRNIF
TWRNIF
RERRIF
TERRIF
BOFFIF
OVRIF
RXF
TXE0
TXE1
TXE2
Local
Mask
WUPIE
RWRNIE
TWRNIE
RERRIE
TERRIE
BOFFIE
OVRIE
RXFIE
TXEIE0
TXEIE1
TXEIE2
Global
Mask
I bit
16.7 Protocol Violation Protection
The MSCAN08 will protect the user from accidentally violating the CAN protocol
through programming errors. The protection logic implements the following
features:
• The receive and transmit error counters cannot be written or otherwise
manipulated.
• All registers which control the configuration of the MSCAN08 can not
be modified while the MSCAN08 is on-line. The SFTRES bit in the
MSCAN08 module control register (see 16.13.1 MSCAN08 Module
Control Register 0) serves as a lock to protect the following registers:
– MSCAN08 module control register 1 (CMCR1)
– MSCAN08 bus timing register 0 and 1 (CBTR0 and CBTR1)
– MSCAN08 identifier acceptance control register (CIDAC)
– MSCAN08 identifier acceptance registers (CIDAR0–3)
– MSCAN08 identifier mask registers (CIDMR0–3)
• The CAN_Tx pin is forced to recessive when the MSCAN08 is in any of the
low-power modes.
MC68HC908GZ8
MOTOROLA
MSCAN08 Controller (MSCAN08)
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Data Sheet
171