M306V2ME Datasheet, PDF (33/276 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

MITSUBISHI MICROCOMPUTERS
M306V2ME-XXXFP
M306V2EEFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
(6) Hold signal
The hold signal is used to transfer the bus privileges from the CPU to the external circuits. Inputting “L”
__________
to the HOLD pin places the microcomputer in the hold state at the end of the current bus access. This
__________
__________
status is maintained and “L” is output from the HLDA pin as long as “L” is input to the HOLD pin. Table
2.4.7 shows the microcomputer status in the hold state.
__________
Bus-using priorities are given to HOLD, DMAC, and CPU in order of decreasing precedence.
__________
HOLD > DMAC > CPU
Figure 2.4.7 Bus-using priorities
Table 2.4.7 Microcomputer status in hold state
Item
Oscillation
___
_____ _______
R/W signal, address bus, data bus, CS, BHE
Programmable I/O ports
P0, P1, P2, P3, P4, P5
__________
HLDA
P6, P7, P8, P9, P10
Internal peripheral circuits
ALE signal
Status
ON
Floating
Floating
Maintains status when hold signal is received
Output “L”
ON (but watchdog timer stops)
Undefined
(7) External bus status when internal area is accessed
Table 2.4.8 shows the external bus status when the internal area is accessed.
Table 2.4.8 External bus status when the internal area is accessed
Item
SFR accessed
Internal ROM/RAM accessed
Address bus
Address output
Maintain status before accessed
address of external area
Data bus When read
Floating
Floating
When write
Output data
Undefined
RD, WR, WRL, WRH
RD, WR, WRL, WRH output
Output "H"
BHE
BHE output
Maintain status before accessed
status of external area
CS
Output "H"
Output "H"
ALE
Output "L"
Output "L"
(8) BCLK output
The output of the internal clock φ can be selected using bit 7 of the processor mode register 0 (address
000416) (Note). The output is floating when bit 7 is set to “1”.
Note: Before attempting to change the contents of the processor mode register 0, set bit 1 of the
protect register (address 000A16) to “1”.
Rev. 1.0
33