M306V2ME Datasheet, PDF (126/276 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

MITSUBISHI MICROCOMPUTERS
M306V2ME-XXXFP
M306V2EEFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
Tc
Transfer clock
Transmit enable
“1”
bit(TE)
“0”
Transmit buffer
“1”
empty flag(TI)
“0”
TxD2
RxD2
Signal conductor level
(Note 1)
Transmit register “1”
empty flag (TXEPT) _{“0”}
Transmit interrupt ^{“1”}
request bit (IR)
“0”
Data is set in UARTi transmit buffer register
Start
bit
Transferred from UARTi transmit buffer register to UARTi transmit register
Parity Stop
bit
bit
ST D0 D1 D2 D3 D4 D5 D6 D7 P SP
ST D0 D1 D2 D3 D4 D5 D6 D7 P _SP
ST D0 D1 D2 D3 D4 D5 D6 D7 P SP
A “L” level returns from TxD2 due to
the occurrence of a parity error.
ST D0 D1 D2 D3 D4 D5 D6 D7 P SP
The level is detected by the
interrupt routine.
The level is
detected by the
interrupt routine.
Shown in ( ) are bit symbols.
Cleared to “0” when interrupt request is accepted, or cleared by software
The above timing applies to the following settings :
• Parity is enabled.
• One stop bit.
• Transmit interrupt cause select bit = “1”.
Tc = 16 (n + 1) / fi or 16 (n + 1) / f EXT
fi : frequency of BRGi count source (f 1, f8, f32)
fEXT : frequency of BRGi count source (external clock)
n : value set to BRGi
Tc
Transfer clock
Receive enable
“1”
bit (RE)
“0”
RxD2
TxD2
Signal conductor level
(Note 1)
Receive complete “1”
flag (RI)
“0”
Receive interrupt ^{“1”}
request bit (IR)
“0”
Start
bit
Parity Stop
bit
bit
ST D0 D1 D2 D3 D4 D5 D6 D7 P SP
ST D0 D1 D2 D3 D4 D5 D6 D7 P SP
ST D0 D1 D2 D3 D4 D5 D6 D7 P
SP
A “L” level returns from TxD2 due to
the occurrence of a parity error.
ST D0 D1 D2 D3 D4 D5 D6 D7 P SP
Read to receive buffer
Read to receive buffer
Shown in ( ) are bit symbols.
The above timing applies to the following settings :
• Parity is enabled.
• One stop bit.
• Transmit interrupt cause select bit = “0”.
Cleared to “0” when interrupt request is accepted, or cleared by software
Tc = 16 (n + 1) / fi or 16 (n + 1) / f EXT
fi : frequency of BRGi count source (f 1, f8, f32)
fEXT : frequency of BRGi count source (external clock)
n : value set to BRGi
Note: Equal in waveform because TxD 2 and RxD2 are connected.
Figure 2.11.27 Typical transmit/receive timing in UART mode (compliant with the SIM interface)
Rev. 1.0
126