M306V2ME Datasheet, PDF (254/276 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

MITSUBISHI MICROCOMPUTERS
M306V2ME-XXXFP
M306V2EEFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
5.7 Timing Requirements
Table 5.7.1 External clock input (referenced to VCC = 5 V, VSS = 0 V at Ta = 25 ^oC unless otherwise
specified)
Symbol
tc
tw(H)
tw(L)
tr
tf
Parameter
External clock input cycle time
External clock input HIGH pulse width
External clock input LOW pulse width
External clock rise time
External clock fall time
Standard
Unit
Min. Max.
100
ns
40
ns
40
ns
15
ns
15
ns
Table 5.7.2 Memory expansion and microprocessor modes (referenced to VCC = 5 V, VSS = 0 V at
Ta = 25 ^oC unless otherwise specified)
Symbol
tac1(RD-DB)
tac2(RD-DB)
tac3(RD-DB)
Parameter
Data input access time (no wait)
Data input access time (with wait)
Data input access time (when accessing multiplex bus area)
Standard
Min. Max.
Unit
(Note) ^ns
(Note) ^ns
(Note) ^ns
tsu(DB-RD)
Data input setup time
tsu(RDY-BCLK ) _{RDY input setup time}
tsu(HOLD-BCLK ) _{HOLD input setup time}
th(RD-DB)
Data input hold time
th(BCLK -RDY) _{RDY input hold time}
th(BCLK-HOLD ) _{HOLD input hold time}
td(BCLK-HLDA ) _{HLDA output delay time}
40
ns
30
ns
40
ns
0
ns
0
ns
0
ns
40
ns
Note: Calculated according to the BCLK frequency as follows:
tac1(RD – DB) =
10 ⁹
f(BCLK) ! 2 ^{– 45}
[ns]
tac2(RD – DB) =
3 ! 10⁹
f(BCLK) ! 2 ^{– 45}
[ns]
tac3(RD – DB) =
3 ! 10 ⁹
f(BCLK) ! 2 ^{– 45}
[ns]
Rev. 1.0
254