M306V2ME Datasheet, PDF (191/276 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

MITSUBISHI MICROCOMPUTERS
M306V2ME-XXXFP
M306V2EEFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
2.16.5 Field Determination Display
To display the block with vertical dot size of 1/2H, whether an even field or an odd field is determined
through differences in a synchronizing signal waveform of interlacing system. The dot line 0 or 1 (refer to
Figure 2.16.18) corresponding to the field is displayed alternately.
In the following, the field determination standard for the case where both the horizontal sync signal and
the vertical sync signal are negative-polarity inputs will be explained. A field determination is determined
by detecting the time from a falling edge of the horizontal sync signal until a falling edge of the VSYNC
control signal (refer to Figure 2.16.9) in the microcomputer and then comparing this time with the time of
the previous field. When the time is longer than the comparing time, it is regarded as even field. When the
time is shorter, it is regarded as odd field.
The field determination flag changes at a rising edge of VSYNC control signal in the microcomputer .
The contents of this field can be read out by the field determination flag (bit 7 of the I/O polarity control
register at address 020616). A dot line is specified by bit 6 of the I/O polarity control register (refer to
Figure 2.16.18).
However, the field determination flag read out from the CPU is fixed to “0” at even field or “1” at odd field,
regardless of bit 6.
I/O polarity control register
b7 b6 b5 b4 b3 b2 b1 b0
0
Symbol
PC
Address
020616
When reset
1000X0002
Bit symbol
Bit name
PC0
PC1
HSYNC input
polarity switch bit
VSYNC input
polarity switch bit
PC2 R, G, B output
polarity switch bit
Reserved bit
Function
0 : Positive polarity input
1 : Negative polarity input
0 : Positive polarity input
1 : Negative polarity input
0 : Positive polarity output
1 : Negative polarity output
Must always be set to “0.”
PC4
OUT1 output
0 : Positive polarity output
polarity switch bit ^{1 : Negative polarity output}
PC5 OUT2 output
0 : Positive polarity output
polarity switch bit ^{1 : Negative polarity output}
PC6
Display dot line
0 : “ ” at even field
selection bit
“ ” at odd field
(See note)
1 : “ ” at even field
“ ” at odd field
PC7
Field determination 0 : Even field
flag
1 : Odd field
Note: Refer to Figure 2.16.19.
RW
Figure 2.16.17 I/O polarity control register
Rev. 1.0
191