M306V2ME Datasheet, PDF (105/276 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

MITSUBISHI MICROCOMPUTERS
M306V2ME-XXXFP
M306V2EEFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
UART0 transmit/receive control register 0
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
U0C0
Address
03A416
When reset
0816
Bit
symbol
CLK0
CLK1
CRS
TXEPT
Bit name
BRG count source
select bit
Function
(During clock synchronous
serial I/O mode)
b1 b0
0 0 : f1 is selected
0 1 : f8 is selected
1 0 : f32 is selected
1 1 : Inhibited
Function
(During UART mode)
b1 b0
0 0 : f1 is selected
0 1 : f8 is selected
1 0 : f32 is selected
1 1 : Inhibited
RW
CTS/RTS function
select bit
Transmit register empty
flag
Valid when bit 4 = “0”
0 : CTS function is selected (Note 1)
1 : RTS function is selected (Note 2)
0 : Data present in transmit
register (during transmission)
1 : No data present in transmit
register (transmission
completed)
Valid when bit 4 = “0”
0 : CTS function is selected (Note 1)
1 : RTS function is selected (Note 2)
0 : Data present in transmit register
(during transmission)
1 : No data present in transmit
register (transmission completed)
CRD CTS/RTS disable bit
0 : CTS/RTS function enabled
1 : CTS/RTS function disabled
(P60 functions as
programmable I/O port)
0 : CTS/RTS function enabled
1 : CTS/RTS function disabled
(P60 functions as
programmable I/O port)
NCH Data output select bit
0 : TXDi pin is CMOS output
1 : TXDi pin is N-channel
open-drain output
0: TXDi pin is CMOS output
1: TXDi pin is N-channel
open-drain output
CKPOL CLK polarity select bit
0 : Transmit data is output at
falling edge of transfer clock
and receive data is input at
rising edge
1 : Transmit data is output at
rising edge of transfer clock
and receive data is input at
falling edge
Must always be set to “0”
UFORM Transfer format select bit ^{0 : LSB first}
1 : MSB first
Must always be set to “0”
Notes 1: Set the corresponding port direction register to “0”.
2: The settings of the corresponding port register and port direction register are invalid.
Figure 2.11.9 UART0 transmit/receive control register 0
Rev. 1.0
105