M306V2ME Datasheet, PDF (251/276 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

MITSUBISHI MICROCOMPUTERS
M306V2ME-XXXFP
M306V2EEFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
5.2 Recommended Operating Conditions
Table 5.2.1 Recommended operating conditions (referenced to VCC = 4.5 V to 5.5 V at Ta = – 10 ^oC
to 70 ^oC unless otherwise specified)
Symbol
Parameter
Standard
Min
Typ. Max. ^Unit
Vcc
Supply voltage (Note 3)
4.5
5.0
5.5
V
AVcc
Analog supply voltage (Note 3)
Vcc
V
Vss
Supply voltage
0
V
VIH
HIGH input voltage ^{P31 to P37, P40 to P47, P50 to P57,}
P60 to P63, P67, P70 to P77, P82, P83, P86, P87,
0.8Vcc
P90 to P94, P100 to P107, HLF, VHOLD, CVIN,
TVSETB, XIN, OSC1, RESET, CNVSS, BYTE
VIH
HIGH input voltage ^{P00 to P07, P10 to P17, P20 to P27, P30}
(during single-chip mode)
0.8Vcc
Vcc
V
Vcc
V
VIH
HIGH input voltage ^{P00 to P07, P10 to P17, P20 to P27, P30}
(data input function during memory expansion
and microprocessor modes)
0.5Vcc
Vcc
V
V IL
LOW input voltage P31 to P37, P40 to P47, P50 to P57,
P60 to P63, P67, P70 to P77, P82, P83, P86, P87,
0
P90 to P94, P100 to P107, XIN, OSC1, RESET,
CNVSS, BYTE
V IL
LOW input voltage P00 to P07, P10 to P17, P20 to P27, P30
(during single-chip mode)
0
V IL
LOW input voltage
P00 to P07, P10 to P17, P20 to P27, P30
(data input function during memory expansion
0
and microprocessor modes)
I OH (peak)
I OH (avg)
I OL (peak)
I OL (avg)
HIGH peak output
current
HIGH average output
current
LOW peak output
current
P00 to P07, P10 to P17, P20 to P27, P30 to P37,
P40 to P47, P50 to P57, P60 to P63, P72 to P77,
P82, P83, P86, P87, P90 to P94, P100 to P107, R, G, B,
OUT1, OUT2
P00 to P07, P10 to P17, P20 to P27, P30 to P37,
P40 to P47, P50 to P57, P60 to P63, P67, P72 to P77,
P82, P83, P86, P87, P90 to P94, P100 to P107, R, G, B,
OUT1, OUT2
P00 to P07, P10 to P17, P20 to P27, P30 to P37,
P40 to P47, P50 to P57, P60 to P63,
P73 to P77, P82, P83, P86, P87, P90 to P92,
P100 to P107, R, G, B, OUT1, OUT2
LOW average output P67, P70 to P72, P93, P94
current
I OL (avg)
f (XIN)
LOW average output
current
P00 to P07, P10 to P17, P20 to P27, P30 to P37,
P40 to P47, P50 to P57, P60 to P63, P67,
P72 to P77, P82, P83, P86, P87, P90 to P94,
P100 to P107, R, G, B, OUT1, OUT2
Main clock input oscillation frequency
0.2Vcc
V
0.2Vcc
V
0.16Vcc V
–10.0
mA
–5.0
mA
10.0
mA
6.0
mA
5.0
mA
10
MHz
f (XcIN) Sub-clock oscillation frequency
32.768
50
kHz
fOSC
f CVIN
VI
Oscillation frequency (for OSD) OSC1 ^{LC oscillating mode}
11.0
Ceramic oscillating mode 24.0
27.0
MHz
25.0
Input frequency
Horizontal sync. signal of video signal 15.262 15.743 16.206 kHz
Input amplitude video signal CVIN
1.5
2.0
2.5
V
Notes 1: The mean output current is the mean value within 100 ms.
2: The total IOL (peak) for ports P0, P1, P2, P86, P87, P9, and P10 must be 80 mA max. The total IOH (peak) for ports
P0, P1, P2, P86, P87, P9, and P10 must be 80 mA max. The total IOL (peak) for ports P3, P4, P5, P6, P7, P82
and P83 must be 80 mA max. The total IOH (peak) for ports P3, P4, P5, P6, P72 to P77, P82 and P83 must be
80 mA max.
3: Connect 0.1 µF or more capacitor externally between the power source pins VCC–VSS and AVCC–VSS so as to
reduce power source noise. Also connect 0.1 µF or more capacitor externally between the power source pins
VCC–CNVSS.
Rev. 1.0
251