M306V2ME Datasheet, PDF (135/276 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

MITSUBISHI MICROCOMPUTERS
M306V2ME-XXXFP
M306V2EEFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
(3) I²Ci address register (i = 0, 1)
_______
The I²Ci address register consists of a 7-bit slave address and a read/write bit. In the addressing
mode, the slave address written in this register is compared with the address data to be received
immediately after the START condition are detected.
_______
s Bit 0: read/write bit (RBW)
Not used when comparing addresses, in the 7-bit addressing mode. In the 10-bit addressing mode,
the first address data to be received is compared with the contents (SAD6 to SAD0 + RBW) of the I²Ci
address register.
The RBW bit is cleared to “0” automatically when the stop condition is detected.
s Bits 1 to 7: slave address (SAD0–SAD6)
These bits store slave addresses. Regardless of the 7-bit addressing mode and the 10-bit addressing
mode, the address data transmitted from the master is compared with the contents of these bits.
I²Ci address register (i = 0, 1)
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
IIC0S0D
IIC1S0D
Address
02E116
02E916
When reset
0016
0016
Bit Symbol
Bit name
Function
RW
RBW
Read/write bit
<Only in 10-bit addressing (in slave) mode>
The last significant bit of address data is
compared.
0 : Wait the first byte of slave address
after START condition
(read state)
1 : Wait the first byte of slave address
after RESTART condition
(write state)
SAD0
SAD1
SAD2
SAD3
SAD4
SAD5
SAD6
Slave address
<In both modes>
The address data is compared.
Fig. 2.11.37 I²Ci address register (i = 0, 1)
Rev. 1.0
135