M306V2ME Datasheet, PDF (220/276 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

MITSUBISHI MICROCOMPUTERS
M306V2ME-XXXFP
M306V2EEFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
2.16.13 Multiline Display
This microcomputer can ordinarily display 16 lines on the CRT screen by displaying 16 blocks at different
vertical positions. In addition, it can display up to 16 lines by using OSD1 interrupts.
An OSD1 interrupt request occurs at the point at which display of each block has been completed. In
other words, when a scanning line reaches the point of the display position (specified by the vertical
position registers) of a certain block, the character display of that block starts, and an interrupt occurs at
the point at which the scanning line exceeds the block. The mode in which an OSD1 interrupt occurs is
different depending on the setting of the OSD control register 2 (refer to Figure 2.16.7).
• When bit 7 of the OSD control register 2 is “0”
An OSD1 interrupt request occurs at the completion of layer 1 block display.
• When bit 7 of the OSD control register 2 is “1”
An OSD1 interrupt request occurs at the completion of layer 2 block display.
Notes 1: An OSD1 interrupt does not occur at the end of display when the block is not displayed. In other
words, if a block is set to off display by the display control bit of the block control register i
(addresses 021016 to 021F16), an OSD1 interrupt request does not occur (refer to Figure
2.16.41 (A)).
2: When another block display appears while one block is displayed, an OSD1 interrupt request
occurs only once at the end of the another block display (refer to Figure 2.16.40 (B)).
3: On the screen setting window, an OSD1 interrupt occurs even at the end of the CC mode block
(off display) out of window (refer to Figure 2.16.40 (C)).
Block 1 (on display)
“OSD1 interrupt request”
Block 1 (on display)
“OSD1 interrupt request”
Block 2 (on display)
“OSD1 interrupt request”
Block 2 (on display)
“OSD1 interrupt request”
Block 3 (on display)
Block 4 (on display)
“OSD1 interrupt request”
“OSD1 interrupt request”
Block 3 (off display)
Block 4 (off display)
On display (OSD1 interrupt request occurs
at the end of block display)
Off display (OSD1 interrupt request does
not occur at the end of block display)
No
“OSD1 interrupt request”
No
“OSD1 interrupt request”
(A)
Block 1
Block 2
No
“OSD1 interrupt request”
“OSD1 interrupt request”
Window
(B)
Figure 2.16.40 Note on occurrence of OSD1 interrupt
Block 1
Block 2
Block 3
(C)
220
“OSD1 interrupt request”
“OSD1 interrupt request”
“OSD1 interrupt request”
Rev. 1.0