M306V2ME Datasheet, PDF (166/276 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

MITSUBISHI MICROCOMPUTERS
M306V2ME-XXXFP
M306V2EEFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
2.14 Data Slicer
This microcomputer includes the data slicer function for the closed caption decoder (referred to as the
CCD). This function takes out the caption data superimposed in the vertical blanking interval of a composite
video signal. A composite video signal which makes the sync chip’s polarity negative is input to the CVIN
pin.
When the data slicer function is not used, the data slicer circuit and the timing signal generating circuit can
be cut off by setting bit 0 of the data slicer control register 1 (address 026016) to “0.” These settings can
realize the low-power dissipation.
Note: When using the data slicer, set bit 7 of the peripheral mode register (address 027D16) according to
the main clock frequency.
Composite
video
signal
0.1 µF _{470 Ω}
1 MΩ
560 pF _{1 µF}
CVIN
HSYNC
1 kΩ
200 pF
HLF
Clamping
circuit
Low-pass
filter
Sync slice
circuit
VHOLD
1000 pF
Reference
voltage
generating
circuit
+
–
Comparator
Synchronizing
signal counter
Synchronizing
separation
circuit
Timing signal
generating
circuit
Clock run-in
determination
circuit
Data slice line
specification
circuit
Data slicer control register 2
(address 026116)
Data slicer control register 1
(address 026016)
Data slicer ON/OFF
Clock run-in detect
register
(address 026916)
External circuit
Note : Make the length of wiring which is connected
to VHOLD, HLF, and CVIN pin as short as
possible so that a leakage current may not
be generated when mounting a resistor or a
capacitor on each pin.
Caption data register 1
(addresses 026316, 026216)
Start bit detecting
circuit
Data clock
generating circuit
16-bit shift register
Caption position register
(address 026616)
Data clock position register
(address 026A16)
Interrupt request
generating circuit
Data slicer
interrupt
request
Caption data register 2
(addresses 026516, 026416)
Data bus
Figure 2.14.1 Data slicer block diagram
166
Rev. 1.0