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PIC18F2585_07 Datasheet, PDF (87/482 Pages) Microchip Technology – Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology
PIC18F2585/2680/4585/4680
TABLE 5-2: REGISTER FILE SUMMARY (PIC18F2585/2680/4585/4680) (CONTINUED)
File Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on Details
POR, BOR on page:
B0DLC(8)
Receive mode
B0DLC(8)
Transmit mode
B0EIDL(8)
B0EIDH(8)
B0SIDL(8)
Receive mode
B0SIDL(8)
Transmit mode
B0SIDH(8)
B0CON(8)
Receive mode
B0CON(8)
Transmit mode
—
—
EID7
EID15
SID2
SID2
SID10
RXFUL
TXBIF
RXRTR
RB1
RB0
TXRTR
—
—
EID6
EID14
SID1
EID5
EID13
SID0
EID4
EID12
SRR
SID1
SID0
—
SID9
RXM1
SID8
SID7
RXRTRRO FILHIT4
TXABT TXLARB TXERR
DLC3
DLC3
EID3
EID11
EXID
EXIDE
SID6
FILHIT3
TXREQ
DLC2
DLC2
EID2
EID10
—
—
SID5
FILHIT2
RTREN
DLC1
DLC1
EID1
EID9
EID17
EID17
SID4
FILHIT1
TXPRI1
DLC0 -xxx xxxx 56, 300
DLC0 -x-- xxxx 56, 301
EID0
EID8
EID16
xxxx xxxx 58, 299
xxxx xxxx 58, 298
xxxx x-xx 56, 297
EID16 xxx- x-xx 56, 297
SID3
FILHIT0
xxxx xxxx 58, 296
0000 0000 58, 295
TXPRI0 0000 0000 58, 295
TXBIE
—
—
—
TXB2IE TXB1IE
TXB0IE
—
—
---0 00-- 58, 318
BIE0
B5IE
B4IE
B3IE
B2IE
B1IE
B0IE
RXB1IE
RXB0IE 0000 0000 58, 318
BSEL0
B5TXEN B4TXEN B3TXEN B2TXEN B1TXEN B0TXEN
—
—
0000 00-- 59, 301
MSEL3
FIL15_1
FIL15_0 FIL14_1 FIL14_0 FIL13_1
FIL13_0
FIL12_1
FIL12_0 0000 0000 59, 310
MSEL2
FIL11_1
FIL11_0 FIL10_1 FIL10_0
FIL9_1
FIL9_0
FIL8_1
FIL8_0 0000 0000 59, 309
MSEL1
FIL7_1
FIL7_0
FIL6_1
FIL6_0
FIL5_1
FIL5_0
FIL4_1
FIL4_0 0000 0101 59, 308
MSEL0
FIL3_1
FIL3_0
FIL2_1
FIL2_0
FIL1_1
FIL1_0
FIL0_1
FIL0_0 0101 0000 59, 307
RXFBCON7 F15BP_3 F15BP_2 F15BP_1 F15BP_0 F14BP_3 F14BP_2 F14BP_1 F14BP_0 0000 0000 59, 305
RXFBCON6 F13BP_3 F13BP_2 F13BP_1 F13BP_0 F12BP_3 F12BP_2 F12BP_1 F12BP_0 0000 0000 59, 305
RXFBCON5 F11BP_3 F11BP_2 F11BP_1 F11BP_0 F10BP_3 F10BP_2 F10BP_1 F10BP_0 0000 0000 59, 305
RXFBCON4
F9BP_3
F9BP_2 F9BP_1 F9BP_0 F8BP_3
F8BP_2
F8BP_1
F8BP_0 0000 0000 59, 305
RXFBCON3
RXFBCON2
F7BP_3
F5BP_3
F7BP_2
F5BP_2
F7BP_1
F5BP_1
F7BP_0
F5BP_0
F6BP_3
F4BP_3
F6BP_2
F4BP_2
F6BP_1
F4BP_1
F6BP_0
F4BP_0
0000 0000 59, 305
0001 0001 59, 305
RXFBCON1
RXFBCON0
F3BP_3
F1BP_3
F3BP_2
F1BP_2
F3BP_1
F1BP_1
F3BP_0
F1BP_0
F2BP_3
F0BP_3
F2BP_2
F0BP_2
F2BP_1
F0BP_1
F2BP_0
F0BP_0
0001 0001 59, 305
0000 0000 59, 305
SDFLC
RXFCON1
—
RXF15EN
—
—
FLC4
FLC3
RXF14EN RXF13EN RXF12EN RXF11EN
FLC2
RXF10EN
FLC1
RXF9EN
FLC0 ---0 0000 59, 305
RXF8EN 0000 0000 59, 306
RXFCON0
RXF15EIDL
RXF7EN
EID7
RXF6EN
EID6
RXF5EN
EID5
RXF4EN
EID4
RXF3EN
EID3
RXF2EN
EID2
RXF1EN
EID1
RXF0EN 0000 0000 59, 305
EID0 xxxx xxxx 59, 303
RXF15EIDH
RXF15SIDL
EID15
SID2
EID14
SID1
EID13
SID0
EID12
—
EID11
EXIDEN
EID10
—
EID9
EID17
EID8
EID16
xxxx xxxx 59, 303
xxx- x-xx 59, 304
RXF15SIDH
RXF14EIDL
SID10
EID7
SID9
EID6
SID8
EID5
SID7
EID4
SID6
EID3
SID5
EID2
SID4
EID1
SID3
EID0
xxxx xxxx 59, 303
xxxx xxxx 59, 303
RXF14EIDH
EID15
EID14
EID13
EID12
EID11
EID10
EID9
EID8 xxxx xxxx 59, 303
RXF14SIDL
SID2
SID1
SID0
—
EXIDEN
—
EID17
EID16 xxx- x-xx 59, 304
RXF14SIDH
SID10
SID9
SID8
SID7
SID6
SID5
SID4
SID3 xxxx xxxx 59, 303
RXF13EIDL
EID7
EID6
EID5
EID4
EID3
EID2
EID1
EID0 xxxx xxxx 59, 303
RXF13EIDH
EID15
EID14
EID13
EID12
EID11
EID10
EID9
EID8 xxxx xxxx 59, 303
Legend: x = unknown, u = unchanged, - = unimplemented, q = value depends on condition
Note 1: Bit 21 of the PC is only available in Test mode and Serial Programming modes.
2: The SBOREN bit is only available when CONFIG2L<1:0> = 01; otherwise, it is disabled and reads as ‘0’. See Section 4.4 “Brown-out Reset
(BOR)”.
3: These registers and/or bits are not implemented on PIC18F2X8X devices and are read as ‘0’. Reset values are shown for PIC18F4X8X
devices; individual unimplemented bits should be interpreted as ‘—’.
4: The PLLEN bit is only available in specific oscillator configuration; otherwise, it is disabled and reads as ‘0’. See Section 2.6.4 “PLL in
INTOSC Modes”.
5: The RE3 bit is only available when Master Clear Reset is disabled (CONFIG3H<7> = 0); otherwise, RE3 reads as ‘0’. This bit is read-only.
6: RA6/RA7 and their associated latch and direction bits are individually configured as port pins based on various primary oscillator modes.
When disabled, these bits read as ‘0’.
7: CAN bits have multiple functions depending on the selected mode of the CAN module.
8: This register reads all ‘0’s until the ECAN™ technology is set up in Mode 1 or Mode 2.
9: These registers are available on PIC18F4X8X devices only.
© 2007 Microchip Technology Inc.
Preliminary
DS39625C-page 85