PIC18F2585_07 Datasheet, PDF (173/482 Pages) Microchip Technology – Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology

PIC18F2585/2680/4585/4680
TABLE 15-5: REGISTERS ASSOCIATED WITH PWM AND TIMER2
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on page
INTCON
GIE/GIEH PEIE/GIEL TMR0IE INT0IE
RBIE
TMR0IF INT0IF
RBIF
49
RCON
IPEN SBOREN⁽²⁾
—
RI
TO
PD
POR
BOR
50
PIR1
PSPIF
ADIF
RCIF
TXIF
SSPIF CCP1IF TMR2IF TMR1IF
52
PIE1
PSPIE
ADIE
RCIE
TXIE
SSPIE CCP1IE TMR2IE TMR1IE
52
IPR1
PSPIP
ADIP
RCIP
TXIP
SSPIP CCP1IP TMR2IP TMR1IP
52
TRISB
PORTB Data Direction Register
52
TRISC
PORTC Data Direction Register
52
TMR2
Timer2 Module Register
50
PR2
Timer2 Module Period Register
50
T2CON
—
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0 50
CCPR1L⁽¹⁾ Capture/Compare/PWM Register 1 (LSB)
51
CCPR1H⁽¹⁾ Capture/Compare/PWM Register 1 (MSB)
51
CCP1CON
—
—
DC1B1 DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 51
ECCPR1L⁽¹⁾ Enhanced Capture/Compare/PWM Register 1 (LSB)
51
ECCPR1H⁽¹⁾ Enhanced Capture/Compare/PWM Register 1 (MSB)
51
ECCP1CON⁽¹⁾ EPWM1M1 EPWM1M0 EDC1B1 EDC1B0 ECCP1M3 ECCP1M2 ECCP1M1 ECCP1M0 51
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PWM or Timer2.
Note 1: These registers are unimplemented on PIC18F2X8X devices.
2: The SBOREN bit is only available when CONFIG2L<1:0> = 01; otherwise, it is disabled and reads as ‘0’.
© 2007 Microchip Technology Inc.
Preliminary
DS39625C-page 171