PIC18F2585_07 Datasheet, PDF(72/482 Page) Microchip Technology – Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology

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PIC18F2585_07 Datasheet, PDF (72/482 Pages) Microchip Technology – Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology

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PIC18F2585/2680/4585/4680

5.3.4 SPECIAL FUNCTION REGISTERS

The Special Function Registers (SFRs) are registers

used by the CPU and peripheral modules for controlling

the desired operation of the device. These registers are

implemented as static RAM. SFRs start at the top of

data memory (FFFh) and extend downward to occupy

the top half of Bank 15 (F80h to FFFh). A list of these

registers is given in Table 5-1 and Table 5-2.

The SFRs can be classified into two sets: those

associated with the âcoreâ device functionality (ALU,

Resets and interrupts) and those related to the

peripheral functions. The reset and interrupt registers

are described in their respective chapters, while the

ALUâs STATUS register is described later in this

section. Registers related to the operation of a

peripheral feature are described in the chapter for that

peripheral.

The SFRs are typically distributed among the

peripherals whose functions they control. Unused SFR

locations are unimplemented and read as â0âs.

TABLE 5-1: SPECIAL FUNCTION REGISTER MAP FOR

PIC18F2585/2680/4585/4680 DEVICES

Address

FFFh

FFEh

FFDh

FFCh

FFBh

FFAh

FF9h

FF8h

FF7h

FF6h

FF5h

FF4h

FF3h

FF2h

FF1h

FF0h

FEFh

FEEh

FEDh

FECh

FEBh

FEAh

FE9h

FE8h

FE7h

FE6h

FE5h

FE4h

FE3h

FE2h

FE1h

FE0h

Name

TOSU

TOSH

TOSL

STKPTR

PCLATU

PCLATH

PCL

TBLPTRU

TBLPTRH

TBLPTRL

TABLAT

PRODH

PRODL

INTCON

INTCON2

INTCON3

INDF0(3)

POSTINC0(3)

POSTDEC0(3)

PREINC0(3)

PLUSW0(3)

FSR0H

FSR0L

WREG

INDF1(3)

POSTINC1(3)

POSTDEC1(3)

PREINC1(3)

PLUSW1(3)

FSR1H

FSR1L

BSR

Address

FDFh

FDEh

FDDh

FDCh

FDBh

FDAh

FD9h

FD8h

FD7h

FD6h

FD5h

FD4h

FD3h

FD2h

FD1h

FD0h

FCFh

FCEh

FCDh

FCCh

FCBh

FCAh

FC9h

FC8h

FC7h

FC6h

FC5h

FC4h

FC3h

FC2h

FC1h

FC0h

Name

INDF2(3)

POSTINC2(3)

POSTDEC2(3)

PREINC2(3)

PLUSW2(3)

FSR2H

FSR2L

STATUS

TMR0H

TMR0L

T0CON

â

OSCCON

HLVDCON

WDTCON

RCON

TMR1H

TMR1L

T1CON

TMR2

PR2

T2CON

SSPBUF

SSPADD

SSPSTAT

SSPCON1

SSPCON2

ADRESH

ADRESL

ADCON0

ADCON1

ADCON2

Address

FBFh

FBEh

FBDh

FBCh

FBBh

FBAh

FB9h

FB8h

FB7h

FB6h

FB5h

FB4h

FB3h

FB2h

FB1h

FB0h

FAFh

FAEh

FADh

FACh

FABh

FAAh

FA9h

FA8h

FA7h

FA6h

FA5h

FA4h

FA3h

FA2h

FA1h

FA0h

Name

CCPR1H

CCPR1L

CCP1CON

ECCPR1H(1)

ECCPR1L(1)

ECCP1CON(1)

â

BAUDCON

ECCP1DEL

ECCP1AS(1)

CVRCON(1)

CMCON

TMR3H

TMR3L

T3CON

SPBRGH

SPBRG

RCREG

TXREG

TXSTA

RCSTA

EEADRH

EEADR

EEDATA

EECON2(3)

EECON1

IPR3

PIR3

PIE3

IPR2

PIR2

PIE2

Address

F9Fh

F9Eh

F9Dh

F9Ch

F9Bh

F9Ah

F99h

F98h

F97h

F96h

F95h

F94h

F93h

F92h

F91h

F90h

F8Fh

F8Eh

F8Dh

F8Ch

F8Bh

F8Ah

F89h

F88h

F87h

F86h

F85h

F84h

F83h

F82h

F81h

F80h

Name

IPR1

PIR1

PIE1

â

OSCTUNE

â

â

â

â

TRISE(1)

TRISD(1)

TRISC

TRISB

TRISA

â

â

â

â

LATE(1)

LATD(1)

LATC

LATB

LATA

â

â

â

â

PORTE(1)

PORTD(1)

PORTC

PORTB

PORTA

Note 1:

2:

3:

Registers available only on PIC18F4X8X devices; otherwise, the registers read as â0â.

When any TX_ENn bit in RX_TX_SELn is set, then the corresponding bit in this register has transmit properties.

This is not a physical register.

DS39625C-page 70

Preliminary

Â© 2007 Microchip Technology Inc.

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