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PIC18F2585_07 Datasheet, PDF (441/482 Pages) Microchip Technology – Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology
PIC18F2585/2680/4585/4680
FIGURE 27-11:
RE2/CS
PARALLEL SLAVE PORT TIMING (PIC18F4585/4680)
RE0/RD
RE1/WR
65
RD7:RD0
64
Note: Refer to Figure 27-4 for load conditions.
62
63
TABLE 27-13: PARALLEL SLAVE PORT REQUIREMENTS (PIC18F4585/4680)
Param.
No.
Symbol
Characteristic
Min Max Units Conditions
62
TDTV2WRH Data In Valid before WR ↑ or CS ↑ (setup time)
20 — ns
63
TWRH2DTI WR ↑ or CS ↑ to Data–In Invalid
(hold time)
PIC18FXXXX 20 — ns
PIC18LFXXXX 35 — ns VDD = 2.0V
64
TRDL2DTV RD ↓ and CS ↓ to Data–Out Valid
— 80 ns
65
TRDH2DTI RD ↑ or CS ↓ to Data–Out Invalid
10 30 ns
66
TIBFINH Inhibit of the IBF Flag bit being Cleared from WR ↑ or CS ↑ — 3 TCY
© 2007 Microchip Technology Inc.
Preliminary
DS39625C-page 439