PIC18F2585_07 Datasheet, PDF (438/482 Pages) Microchip Technology – Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology

PIC18F2585/2680/4585/4680
FIGURE 27-7:
RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND
POWER-UP TIMER TIMING
VDD
MCLR
Internal
30
POR
PWRT
Time-out
33
32
OSC
Time-out
Internal
Reset
Watchdog
Timer
Reset
31
34
I/O pins
Note: Refer to Figure 27-4 for load conditions.
FIGURE 27-8:
BROWN-OUT RESET TIMING
VDD
VIRVST
Enable Internal
Reference Voltage
Internal Reference
Voltage Stable
BVDD
35
36
34
VBGAP = 1.2V
TABLE 27-10: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER
AND BROWN-OUT RESET REQUIREMENTS
Param.
No.
Sym
Characteristic
Min
Typ
Max
Units
Conditions
30
TMCL MCLR Pulse Width (low)
2
—
—
μs
31
TWDT Watchdog Timer Time-out Period (no
3.4
4.00
4.6
ms
postscaler)
32
TOST Oscillation Start-up Timer Period
1024 TOSC — 1024 TOSC — TOSC = OSC1 period
33
TPWRT Power-up Timer Period
55.6 65.5
75
ms
34
TIOZ I/O High-Impedance from MCLR Low
—
2
—
μs
or Watchdog Timer Reset
35
TBOR Brown-out Reset Pulse Width
200
—
—
μs VDD ≤ BVDD (see D005)
36
TIRVST Time for Internal Reference Voltage to
—
20
50
μs
become stable
37
TLVD High/Low-Voltage Detect Pulse Width 200
—
—
μs VDD ≤ VLVD
38
TCSD CPU Start-up Time
—
10
—
μs
39
TIOBST Time for INTOSC to stabilize
—
1
—
μs
DS39625C-page 436
Preliminary
© 2007 Microchip Technology Inc.