PIC18F2585_07 Datasheet, PDF (302/482 Pages) Microchip Technology – Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology

PIC18F2585/2680/4585/4680
REGISTER 23-34: BnDLC: TX/RX BUFFER n DATA LENGTH CODE REGISTERS IN RECEIVE MODE
[0 ≤ n ≤ 5, TXnEN (BSEL<n>) = 0]⁽¹⁾
U-0
R-x
R-x
R-x
R-x
R-x
R-x
R-x
—
RXRTR RB1
RB0
DLC3
DLC2
DLC1
DLC0
bit 7
bit 0
bit 7
bit 6
bit 5
bit 4
bit 3-0
Unimplemented: Read as ‘0’
RXRTR: Receiver Remote Transmission Request bit
1 = This is a remote transmission request
0 = This is not a remote transmission request
RB1: Reserved bit 1
Reserved by CAN Spec and read as ‘0’.
RB0: Reserved bit 0
Reserved by CAN Spec and read as ‘0’.
DLC3:DLC0: Data Length Code bits
1111 = Reserved
1110 = Reserved
1101 = Reserved
1100 = Reserved
1011 = Reserved
1010 = Reserved
1001 = Reserved
1000 = Data length = 8 bytes
0111 = Data length = 7 bytes
0110 = Data length = 6 bytes
0101 = Data length = 5 bytes
0100 = Data length = 4 bytes
0011 = Data length = 3 bytes
0010 = Data length = 2 bytes
0001 = Data length = 1 bytes
0000 = Data length = 0 bytes
Note 1: These registers are available in Mode 1 and 2 only.
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
DS39625C-page 300
Preliminary
© 2007 Microchip Technology Inc.