PIC18F2585_07 Datasheet, PDF (127/482 Pages) Microchip Technology – Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology

PIC18F2585/2680/4585/4680
REGISTER 9-11:
IPR2: PERIPHERAL INTERRUPT PRIORITY REGISTER 2
R/W-1 R/W-1
U-0
OSCFIP CMIP⁽¹⁾
—
R/W-1
EEIP
R/W-1
BCLIP
R/W-1
HLVDIP
bit 7
R/W-1
TMR3IP
R/W-1
ECCP1IP⁽²⁾
bit 0
bit 7
OSCFIP: Oscillator Fail Interrupt Priority bit
1 = High priority
0 = Low priority
bit 6
CMIP: Comparator Interrupt Priority bit⁽¹⁾
1 = High priority
0 = Low priority
bit 5
Unimplemented: Read as ‘0’
bit 4
EEIP: Data EEPROM/Flash Write Operation Interrupt Priority bit
1 = High priority
0 = Low priority
bit 3
BCLIP: Bus Collision Interrupt Priority bit
1 = High priority
0 = Low priority
bit 2
HLVDIP: High/Low-Voltage Detect Interrupt Priority bit
1 = High priority
0 = Low priority
bit 1
TMR3IP: TMR3 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
bit 0
ECCP1IP: ECCP1 Interrupt Priority bit⁽²⁾
1 = High priority
0 = Low priority
Note 1: This bit is available in PIC18F4X8X devices and reserved in PIC18F2X8X devices.
2: This bit is available in PIC18F4X8X devices only.
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
© 2007 Microchip Technology Inc.
Preliminary
DS39625C-page 125