PIC18F2585_07 Datasheet, PDF (81/482 Pages) Microchip Technology – Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology

PIC18F2585/2680/4585/4680
TABLE 5-2: REGISTER FILE SUMMARY (PIC18F2585/2680/4585/4680) (CONTINUED)
File Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on Details
POR, BOR on page:
PORTE⁽³⁾
PORTD⁽³⁾
PORTC
—
—
—
—
Read PORTD pins, Write PORTD Data Latch
Read PORTC pins, Write PORTC Data Latch
RE3⁽⁵⁾
RE2⁽³⁾
RE1⁽³⁾
RE0⁽³⁾
---- xxxx 52, 145
xxxx xxxx 52, 138
xxxx xxxx 52, 135
PORTB
PORTA
Read PORTB pins, Write PORTB Data Latch
RA7⁽⁶⁾
RA6⁽⁶⁾ Read PORTA pins, Write PORTA Data Latch
xxxx xxxx 52, 132
xx00 0000 52, 129
ECANCON
TXERRCNT
MDSEL1
TEC7
MDSEL0
TEC6
FIFOWM
TEC5
EWIN4
TEC4
EWIN3
TEC3
EWIN2
TEC2
EWIN1
TEC1
EWIN0
TEC0
0001 000 52, 280
0000 0000 52, 285
RXERRCNT
COMSTAT
Mode 0
REC7
REC6
RXB0OVFL RXB1OVFL
REC5
TXBO
REC4
TXBP
REC3
RXBP
REC2
TXWARN
REC1
RXWARN
REC0
EWARN
0000 0000 52, 293
0000 0000 52, 281
COMSTAT
Mode 1
—
RXBnOVFL TXBO
TXBP
RXBP
TXWARN RXWARN EWARN -000 0000 52, 281
COMSTAT
Mode 2
FIFOEMPTY RXBnOVFL TXBO
TXBP
RXBP
TXWARN RXWARN EWARN 0000 0000 52, 281
CIOCON
—
—
ENDRHI CANCAP
—
—
—
—
--00 ---- 52, 314
BRGCON3
WAKDIS WAKFIL
—
—
—
SEG2PH2 SEG2PH1 SEG2PH0 00-- -000 52, 313
BRGCON2 SEG2PHTS SAM SEG1PH2 SEG1PH1 SEG1PH0 PRSEG2 PRSEG1 PRSEG0 0000 0000 52, 312
BRGCON1
CANCON
Mode 0
CANCON
Mode 1
CANCON
Mode 2
CANSTAT
Mode 0
CANSTAT
Modes 1, 2
SJW1
REQOP2
SJW0
REQOP1
BRP5
REQOP0
BRP4
ABAT
BRP3
WIN2⁽⁷⁾
BRP2
WIN1⁽⁷⁾
BRP1
WIN0⁽⁷⁾
BRP0
—⁽⁷⁾
0000 0000 52, 311
1000 000- 53, 276
REQOP2 REQOP1 REQOP0 ABAT
—⁽⁷⁾
—⁽⁷⁾
—⁽⁷⁾
—⁽⁷⁾
1000 ---- 53, 276
REQOP2 REQOP1 REQOP0 ABAT
FP3⁽⁷⁾
FP2⁽⁷⁾
FP1⁽⁷⁾
FP0⁽⁷⁾ 1000 0000 53, 276
OPMODE2 OPMODE1 OPMODE0
—⁽⁷⁾
ICODE3⁽⁷⁾ ICODE2⁽⁷⁾ ICODE1⁽⁷⁾
—⁽⁷⁾
000- 0000 53, 277
OPMODE2 OPMODE1 OPMODE0 EICODE4⁽⁷⁾ EICODE3⁽⁷⁾ EICODE2⁽⁷⁾ EICODE1⁽⁷⁾ EICODE0⁽⁷⁾ 0000 0000 53, 277
RXB0D7
RXB0D77 RXB0D76 RXB0D75 RXB0D74 RXB0D73 RXB0D72 RXB0D71 RXB0D70 xxxx xxxx 53, 292
RXB0D6
RXB0D67 RXB0D66 RXB0D65 RXB0D64 RXB0D63 RXB0D62 RXB0D61 RXB0D60 xxxx xxxx 53, 292
RXB0D5
RXB0D57 RXB0D56 RXB0D55 RXB0D54 RXB0D53 RXB0D52 RXB0D51 RXB0D50 xxxx xxxx 53, 292
RXB0D4
RXB0D47 RXB0D46 RXB0D45 RXB0D44 RXB0D43 RXB0D42 RXB0D41 RXB0D40 xxxx xxxx 53, 292
RXB0D3
RXB0D37 RXB0D36 RXB0D35 RXB0D34 RXB0D33 RXB0D32 RXB0D31 RXB0D30 xxxx xxxx 53, 292
RXB0D2
RXB0D27 RXB0D26 RXB0D25 RXB0D24 RXB0D23 RXB0D22 RXB0D21 RXB0D20 xxxx xxxx 53, 292
RXB0D1
RXB0D17 RXB0D16 RXB0D15 RXB0D14 RXB0D13 RXB0D12 RXB0D11 RXB0D10 xxxx xxxx 53, 292
RXB0D0
RXB0D07 RXB0D06 RXB0D05 RXB0D04 RXB0D03 RXB0D02 RXB0D01 RXB0D00 xxxx xxxx 53, 292
RXB0DLC
—
RXRTR
RB1
RB0
DLC3
DLC2
DLC1
DLC0 -xxx xxxx 53, 292
RXB0EIDL
EID7
EID6
EID5
EID4
EID3
EID2
EID1
EID0 xxxx xxxx 53, 291
RXB0EIDH
EID15
EID14
EID13
EID12
EID11
EID10
EID9
EID8 xxxx xxxx 53, 291
RXB0SIDL
RXB0SIDH
RXB0CON
Mode 0
SID2
SID10
RXFUL
SID1
SID9
RXM1
SID0
SID8
RXM0⁽⁷⁾
SRR
SID7
—⁽⁷⁾
EXID
—
SID6
SID5
RXRTRRO⁽⁷⁾ RXBODBEN⁽⁷⁾
EID17
SID4
JTOFF⁽⁷⁾
EID16
SID3
FILHIT0⁽⁷⁾
xxxx x-xx 53, 291
xxxx xxxx 53, 290
000- 0000 53, 287
RXB0CON
Mode 1, 2
RXFUL
RXM1
RTRRO FILHIT4 FILHIT3
FILHIT2
FILHIT1
FILHIT0 0000 0000 53, 287
Legend: x = unknown, u = unchanged, - = unimplemented, q = value depends on condition
Note 1: Bit 21 of the PC is only available in Test mode and Serial Programming modes.
2: The SBOREN bit is only available when CONFIG2L<1:0> = 01; otherwise, it is disabled and reads as ‘0’. See Section 4.4 “Brown-out Reset
(BOR)”.
3: These registers and/or bits are not implemented on PIC18F2X8X devices and are read as ‘0’. Reset values are shown for PIC18F4X8X
devices; individual unimplemented bits should be interpreted as ‘—’.
4: The PLLEN bit is only available in specific oscillator configuration; otherwise, it is disabled and reads as ‘0’. See Section 2.6.4 “PLL in
INTOSC Modes”.
5: The RE3 bit is only available when Master Clear Reset is disabled (CONFIG3H<7> = 0); otherwise, RE3 reads as ‘0’. This bit is read-only.
6: RA6/RA7 and their associated latch and direction bits are individually configured as port pins based on various primary oscillator modes.
When disabled, these bits read as ‘0’.
7: CAN bits have multiple functions depending on the selected mode of the CAN module.
8: This register reads all ‘0’s until the ECAN™ technology is set up in Mode 1 or Mode 2.
9: These registers are available on PIC18F4X8X devices only.
© 2007 Microchip Technology Inc.
Preliminary
DS39625C-page 79